SmartFusion DC and Switching Characteristics
2-10 Revision 10
Calculating Power Dissipation
Quiescent Supply Current
Power per I/O Pin
Table 2-8 • Power Supplies Configuration
Modes and Power
Supplies
VCCxxxxIOBx
VCCFPGAIOBx
VCCMSSIOBx
VCC33A / VCC33ADCx
VCC33AP / VCC33SDDx
VCCMAINXTAL / VCCLPXTAL
VCC / VCC15A / VCC15ADCx
VCCPLLx, VCCENVM,
VCCESRAM
VDDBAT
VCCRCOSC
VJTAG
VPP
eNVM (reset/off)
LPXTAL (enable/disable)
MAINXTAL (enable/disable)
Time Keeping mode 0 V 0 V 0 V 3.3 V 0 V 0 V 0 V Off Enable Disable
Standby mode On* 3.3 V 1.5 V N/A 3.3 V N/A N/A Reset Enable Disable
SoC mode On* 3.3 V 1.5 V N/A 3.3 V N/A N/A On Enable Enable
Note: *On means proper voltage is applied. Refer to Table 2-3 on page 2-3 for recommended operating conditions.
Table 2-9 • Quiescent Supply Current Characteristics
Parameter Modes
A2F060 A2F200 A2F500
1.5 V
Domain
3.3 V
Domain
1.5 V
Domain
3.3 V
Domain
1.5 V
Domain
3.3 V
Domain
IDC1 SoC mode 3 mA 2 mA 7 mA 4 mA 16.5 mA 4 mA
IDC2 Standby mode 3 mA 2 mA 7 mA 4 mA 16.5 mA 4 mA
IDC3 Time Keeping mode N/A 10 µA N/A 10 µA N/A 10 µA
Table 2-10 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings
Applicable to FPGA I/O Banks, I/O Assigned to EMC I/O Pins
VCCFPGAIOBx (V)
Static Power
PDC7 (mW)
Dynamic Power PAC9
(µW/MHz)
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS 3.3 – 17.55
2.5 V LVCMOS 2.5 – 5.97
1.8 V LVCMOS 1.8 – 2.88
1.5 V LVCMOS (JESD8-11) 1.5 – 2.33
3.3 V PCI 3.3 – 19.21
3.3 V PCI-X 3.3 – 19.21
Differential
LVDS 2.5 2.26 0.82
LVPECL 3.3 5.72 1.16