SmartFusion DC and Switching Characteristics
2-90 Revision 10
sp6 Data from master (SPI_x_DO) setup time
2
1 1 1 pclk cycles
sp7 Data from master (SPI_x_DO) hold time
2
1 1 1 pclk cycles
sp8 SPI_x_DI setup time
2
1 1 1 pclk cycles
sp9 SPI_x_DI hold time
2
1 1 1 pclk cycles
Figure 2-48 • SPI Timing for a Single Frame Transfer in Motorola Mode (SPH = 1)
Table 2-101 • SPI Characteristics
Commercial Case Conditions: T
J
= 85ºC, VDD = 1.425 V, –1 Speed Grade (continued)
Symbol Description and Condition A2F060 A2F200 A2F500 Unit
Notes:
1. These values are provided for a load of 35 pF. For board design considerations and detailed output buffer resistances,
use the corresponding IBIS models located on the Microsemi SoC Products Group website:
http://www.microsemi.com/soc/download/ibis/default.aspx.
2. For allowable pclk configurations, refer to the Serial Peripheral Interface Controller section in the SmartFusion
Microcontroller Subsystem User’s Guide.
SPI_x_CLK
SPO = 0
SPI_x_DO
SP6 SP7
50%50%
MSB
50% 50% 50%
SP2
SP1
90%
10% 10%
SP4 SP5
SP8 SP9
50%
50%
MSB
SPI_x_DI
10%
90%
SP5
90%
10%
SP4
90%
10%10%
SP4SP5
90%
SPI_x_SS
SPI_x_CLK
SPO = 1
SP3