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A14V60AA-1CQ208B

A14V60AA-1CQ208B首页预览图
型号: A14V60AA-1CQ208B
PDF文件:
  • A14V60AA-1CQ208B PDF文件
  • A14V60AA-1CQ208B PDF在线浏览
功能描述: Accelerator Series FPGAs - ACT 3Family
PDF文件大小: 479.35 Kbytes
PDF页数: 共68页
制造商: ACTEL[Actel Corporation]
制造商LOGO: ACTEL[Actel Corporation] LOGO
制造商网址: http://www.actel.com
捡单宝A14V60AA-1CQ208B
PDF页面索引
120%
1-210
A1440A, A14V40A Timing Characteristics (continued)
(Worst-Case Commercial Conditions)
Note:
1. Delays based on 35pF loading.
Dedicated (Hard-Wired) I/O Clock
Network ‘–3’ Speed ‘–2’ Speed ‘–1’ Speed ‘Std’ Speed 3.3V Speed
Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
t
IOCKH
Input Low to High
(Pad to I/O Module Input) 2.0 2.3 2.6 3.0 3.5 ns
t
IOPWH
Minimum Pulse Width High 1.9 2.4 3.3 3.8 4.8 ns
t
IOPWL
Minimum Pulse Width Low 1.9 2.4 3.3 3.8 4.8 ns
t
IOSAPW
Minimum Asynchronous
Pulse Width 1.9 2.4 3.3 3.8 4.8 ns
t
IOCKSW
Maximum Skew 0.4 0.4 0.4 0.4 0.4 ns
t
IOP
Minimum Period 4.0 5.0 6.8 8.0 10.0 ns
f
IOMAX
Maximum Frequency 250 200 150 125 100 MHz
Dedicated (Hard-Wired) Array Clock
Network
t
HCKH
Input Low to High
(Pad to S-Module Input) 3.0 3.4 3.9 4.5 5.5 ns
t
HCKL
Input High to Low
(Pad to S-Module Input) 3.0 3.4 3.9 4.5 5.5 ns
t
HPWH
Minimum Pulse Width High 1.9 2.4 3.3 3.8 4.8 ns
t
HPWL
Minimum Pulse Width Low 1.9 2.4 3.3 3.8 4.8 ns
t
HCKSW
Maximum Skew 0.3 0.3 0.3 0.3 0.3 ns
t
HP
Minimum Period 4.0 5.0 6.8 8.0 10.0 ns
f
HMAX
Maximum Frequency 250 200 150 125 100 MHz
Routed Array Clock Networks
t
RCKH
Input Low to High (FO=64) 3.7 4.1 4.7 5.5 9.0 ns
t
RCKL
Input High to Low (FO=64) 4.0 4.5 5.1 6.0 9.0 ns
t
RPWH
Min. Pulse Width High
(FO=64) 3.3 3.8 4.2 4.9 6.5 ns
t
RPWL
Min. Pulse Width Low
(FO=64) 3.3 3.8 4.2 4.9 6.5 ns
t
RCKSW
Maximum Skew (FO=128) 0.7 0.8 0.9 1.0 1.0 ns
t
RP
Minimum Period (FO=64) 6.8 8.0 8.7 10.0 13.4 ns
f
RMAX
Maximum Frequency
(FO=64) 150 125 115 100 75 MHz
Clock-to-Clock Skews
t
IOHCKSW
I/O Clock to H-Clock Skew 0.0 1.7 0.0 1.8 0.0 2.0 0.0 2.2 0.0 3.0 ns
t
IORCKSW
I/O Clock to R-Clock Skew
(FO = 64)
(FO = 144)
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
0.0
0.0
3.0
3.0
ns
ns
t
HRCKSW
H-Clock to R-Clock Skew
(FO = 64)
(FO = 144)
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
0.0
0.0
1.0
3.0
ns
ns
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