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Output Buffer Delays
AC Test Loads
Input Buffer Delays Module Delays
To AC test loads (shown below)
PAD
D
E
TRIBUFF
In
V
CC
GND
50%
Out
V
OL
V
OH
1.5 V
t
DHS,
50%
1.5 V
t
DHS,
En
V
CC
GND
50%
Out
V
OL
1.5 V
t
ENZHS,
50%
10%
t
ENHSZ,
En
V
CC
GND
50%
Out
GND
V
OH
1.5 V
t
ENZHS,
50%
90%
t
ENHSZ,
V
CC
Load 1
(Used to measure propagation delay)
Load 2
(Used to measure rising/falling edges)
35 pF
To the output under test
V
CC
GND
35 pF
To the output under test
R to V
CC
for t
PLZ
/t
PZL
R to GND for t
PHZ
/t
PZH
R = 1 kΩ
PAD
Y
INBUF
In
3 V
0 V
1.5 V
Out
GND
V
CC
50%
t
INY
1.5 V
50%
t
INY
S
A
B
Y
S, A or B
Out
GND
V
CC
50%
t
PD
Out
GND
GND
V
CC
50%
50%
50%
V
CC
50% 50%
t
PD
t
PD
t
PD