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Description
Actel’s ACT 3 Accelerator Series of FPGAs offers the
industry’s fastest high-capacity programmable logic device.
ACT 3 FPGAs offer a high perfomance, PCI compliant
programmable solution capable of 250 MHz on-chip
performance and 7.5 nanosecond clock-to-output, with
capacities spanning from 1,500 to 10,000 gate array
equivalent gates. For further information regarding PCI
compliance of ACT 3 devices, see “Accelerator Series
FPGAs—ACT 3 PCI Compliant Family.”
The ACT 3 family builds on the proven two-module
architecture consisting of combinatorial and sequential logic
modules used in Actel’s 3200DX and 1200XL families. In
addition, the ACT 3 I/O modules contain registers which
deliver 7.5 nanosecond clock-to-out times. The devices
contain four clock distribution networks, including dedicated
array and I/O clocks, supporting very fast synchronous and
asynchronous designs. In addition, routed clocks can be used
to drive high fanout signals such as flip-flop resets and output
enables.
The ACT 3 family is supported by Actel’s Designer Series
Development System which offers automatic placement and
routing (with automatic or fixed pin assignments), static
timing anlaysis, user programming, and debug and diagnostic
probe capabilities. The Designer Series is supported on the
following platforms: 486/Pentium class PC’s, Sun
®
‚ and HP
®
‚
workstations. The software provides CAE interfaces to
Cadence, Mentor Graphics
®
, OrCAD
™
and Viewlogic
®
‚
design environments. Additional platforms are supported
through Actel’s Industry Alliance Program, including DATA
I/O (ABEL FPGA) and MINC.
System Performance Model
250 MHz
Shift Registers
250 MHz
Prescaled Loadable Counters (16-bit)
110 MHz
Loadable Counters (16-bit)
63 MHz
Accumulators (16-bit)
Predictable Performance* (Worst-Case Commercial)
Chip-to-Chip Performance
(Worst-Case Commercial)
t
CKHS
t
TRACE
t
INSU
Total MHz
A1425A-3 7.5 1.0 1.8 10.3 ns 97
A1460A-3 9.0 1.0 1.3 11.3 ns 88
I/O ModuleI/O Module
35 pF
I/O CLK
I/O CLK
t
CKHS
t
TRACE
t
INSU
Chip #1 Chip #2
