56 Primary Events
8 Secondary Events
357 Common Events
19 Reserved Events
EDMA3
CC0
26 QMSS q_pend Events
402 Common Events
12 Reserved Events
44 Primary Events
20 Secondary Events
EDMA3
CC1
56 Primary Events
8 Secondary Events
EDMA3
CC2
20 Broadcast Events from CIC0
C66x
CorePac3
18 Secondary Events
C66x
CorePac2
18 Secondary Events
C66x
CorePac1
18 Secondary Events
C66x
CorePac0
18 Secondary Events
19 Unique Primary Events
19 Unique Primary Events
19 Unique Primary Events
19 Unique Primary Events
8 Broadcast Events from AIF2
57 Shared Primary Events
9 QMSS q_pend Events
32 QMSS lo Events
32 QMSS_2 hi Events
39 QMSS q_pend Events
32 QMSS_1 hi Events
6630
8 Shared Events
CIC0
ARM
INTC
480 SPI Events
Peripherals
36
CIC2
66AK2L06
SPRS930 –APRIL 2015
www.ti.com
Figure 7-5. Interrupt Topology
Table 7-22 shows the mapping of primary events to C66x Corepac
Table 7-22. System Event Mapping — C66x CorePac Primary Interrupts
EVENT NO. EVENT NAME DESCRIPTION
0 EVT0 Event combiner 0 output
1 EVT1 Event combiner 1 output
2 EVT2 Event combiner 2 output
3 EVT3 Event combiner 3 output
4 TETB_HFULLINTN TETB is half full
5 TETB_FULLINTN TETB is full
6 TETB_ACQINTN TETB Acquisition complete interrupt
7 TETB_OVFLINTN TETB Overflow condition interrupt
8 TETB_UNFLINTN TETB Underflow condition interrupt
9 EMU_DTDMA Emulation interrupt for host scan, DTDMA transfer complete and AET
10 MSMC_MPF_ERRORN Memory protection fault indicators for system master PrivID = 0 (C66x
CorePac)
11 EMU_RTDXRX Reserved
12 EMU_RTDXTX Reserved
82 Memory, Interrupts, and EDMA for 66AK2L06 Copyright © 2015, Texas Instruments Incorporated
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