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66AK2L06

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型号: 66AK2L06
PDF文件:
  • 66AK2L06 PDF文件
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功能描述: 66AK2L06 Multicore DSPARM KeyStone II System-on-Chip (SoC)
PDF文件大小: 1516.59 Kbytes
PDF页数: 共298页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝66AK2L06
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120%
66AK2L06
www.ti.com
SPRS930 APRIL 2015
Table 7-1. Device Memory Map Summary for 66AK2L06 (continued)
PHYSICAL 40 BIT ADDRESS
BYTES ARM VIEW DSP VIEW SOC VIEW
START END
08 0000 0000 09 FFFF FFFF 8G DDR3A data DDR3A data
(2)
DDR3A data
(3)
0A 0000 0000 FF FFFF FFFF 984G Reserved Reserved Reserved
7.2 Memory Protection Unit (MPU)
CFG (configuration) space of all slave devices on the TeraNet is protected by the MPU. The 66AK2L06
contains sixteen MPUs:
MPU0 is used for main TeraNet_3P_B (SCR_3P (B)) CFG.
MPU1/2/5 are used for QM_SS (one for VBUSM port and one each for the two configuration VBUSP
ports).
MPU3 is reserved.
MPU4 is reserved.
MPU6 is reserved.
MPU7 is used for OSR data.
MPU8 is used for EMIF16.
MPU9 is used for interrupt controllers (GIC, CIC0 and CIC2) connected to TeraNet_3P (SCR_3P).
MPU10 is used for semaphore.
MPU11 is used to protect TeraNet_6P_B (SCR_6P (B)) CPU/6 CFG TeraNet.
MPU12/13/14 are used for SPI0/1/2.
MPU15 is used DFE, IQNet and NetCP CFG.
This section contains MPU register map and details of device-specific MPU registers only. For MPU
features and details of generic MPU registers, see the KeyStone Architecture Memory Protection Unit
(MPU) User's Guide (SPRUGW5).
The following tables show the configuration of each MPU and the memory regions protected by each
MPU.
Table 7-2. MPU0-MPU5 Default Configuration
MPU0 MPU1 MPU2 MPU5
SETTING MAIN SCR_3P QM_SS DATA QM_SS CFG1 MPU3 MPU4 QM_SS CFG2
(B) PORT PORT PORT
Default permission Assume Assume allowed Assume allowed Reserved Reserved Assume
allowed allowed
Number of allowed IDs 16 16 16 16
supported
Number of programmable 16 16 16 16
ranges supported
Compare width 1KB granularity 1KB granularity 1KB granularity 1KB granularity
Table 7-3. MPU6-MPU11 Default Configuration
MPU7 MPU8 MPU9 MPU10 MPU11
SETTING MPU6
OSR EMIF16 CIC SM SCR_6P (B)
Default permission Reserved Assume allowed Assume allowed Assume Assume Assume
allowed allowed allowed
Number of allowed IDs 16 16 16 16 16
supported
Number of programmable 16 8 4 2 16
ranges supported
Compare width 1KB granularity 1KB granularity 1KB granularity 1KB granularity 1KB granularity
Copyright © 2015, Texas Instruments Incorporated Memory, Interrupts, and EDMA for 66AK2L06 67
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