66AK2L06
SPRS930 –APRIL 2015
www.ti.com
Table 6-2. Terminal Functions — Signals and Control by Function (continued)
BALL
SIGNAL NAME NO. TYPE IPD/IPU DESCRIPTION
SPI0SCS0 L30 IOZ Up SPI0 interface enable 0
SPI0SCS1 K28 IOZ Up SPI0 interface enable 1
SPI0SCS2 K30 IOZ Up SPI0 interface enable 2
SPI0SCS3 K29 IOZ Up SPI0 interface enable 3
SPI0SCS4 M29 IOZ Up SPI0 interface enable 4
SPI1
SPI1CLK M26 IOZ Down SPI1 clock
SPI1DIN L26 IOZ Down SPI1 data in
SPI1DOUT N26 IOZ Down SPI1 data out
SPI1SCS0 M28 IOZ Up SPI1 interface enable 0
SPI1SCS1 L28 IOZ Up SPI1 interface enable 1
SPI1SCS2 M27 IOZ Up SPI1 interface enable 2
SPI2
L4 IOZ Up
SPI2CLK
2
SPI2 clock (
2
pin is a secondary function and is shared with UART0CTS)
K2 IOZ Up
SPI2SCS0
2
SPI2 interface enable 0 (
2
pin is a secondary function and is shared with UART0RTS)
G26 IOZ Up
SPI2SCS1
2
SPI2 interface enable 1 (
2
pin is a secondary function and is shared with GPIO00)
F27 IOZ Down
SPI2SCS2
2
SPI2 interface enable 2 (
2
pin is a secondary function and is shared with GPIO01)
F26 IOZ Down
SPI2SCS3
2
SPI2 interface enable 3 (
2
pin is a secondary function and is shared with GPIO02)
G29 IOZ Down
SPI2SCS4
2
SPI2 interface enable 4 (
2
pin is a secondary function and is shared with GPIO03)
J4 IOZ Up
SPI2DIN
2
SPI2 data in (
2
pin is a secondary function and is shared with UART1RTS)
K4 IOZ Up
SPI2DOUT
2
SPI2 data out (
2
pin is a secondary function and is shared with UART1CTS)
Sync-Ethernet / IEEE1588
TSCOMPOUT AG1 O Down IEEE1588 compare output
TSPUSHEVT0 AF1 I Down PPS push event from GPS for IEEE1588
TSPUSHEVT1 AH1 I Down Push event from BCN for IEEE1588
TSSYNCEVT AG2 O Down IEEE1588 sync event output
Timer
TIMI0 J2 IOZ Down
Timer inputs
TIMI1 J1 IOZ Down
F28 IOZ Down
TIMI2
2
G27 IOZ Down
TIMI3
2
Timer inputs
H30 IOZ Down
TIMI4
2
J26 IOZ Down
TIMI5
2
(
2
pins are secondary functions and are shared with GPIO[04:07])
H26 IOZ Down
TIMI6
2
H29 IOZ Down
TIMI7
2
TIMO0 H3 IOZ Down
Timer outputs
TIMO1 J3 IOZ Up
J27 IOZ Down
TIMO2
2
H28 IOZ Down
TIMO3
2
Timer outputs
G28 IOZ Down
TIMO4
2
H27 IOZ Down
TIMO5
2
(
2
pins are secondary functions and are shared with GPIO[10:15])
J30 IOZ Down
TIMO6
2
K27 IOZ Down
TIMO7
2
UART0
UART0CTS L4 I Up
UART0RTS K2 O Up
UART0
UART0RXD K5 I Down
UART0TXD K3 O Down
UART1
38 Terminals Copyright © 2015, Texas Instruments Incorporated
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