66AK2L06
SPRS930 –APRIL 2015
www.ti.com
11.22 General-Purpose Input/Output (GPIO)
11.22.1 GPIO Device-Specific Information
The GPIO peripheral pins are used for general purpose input/output for the device. These pins are also
used to configure the device at boot time.
For more detailed information on device/peripheral configuration and the 66AK2L06 device pin muxing,
see Section 9.2.
These GPIO pins can also be used to generate individual core interrupts (no support of bank interrupt)
and EDMA events.
11.22.2 GPIO Peripheral Register Description
Table 11-62. GPIO Registers
HEX ADDRESS OFFSETS ACRONYM REGISTER NAME
0x0008 BINTEN GPIO interrupt per bank enable register
0x000C - Reserved
0x0010 DIR GPIO Direction Register
0x0014 OUT_DATA GPIO Output Data Register
0x0018 SET_DATA GPIO Set Data Register
0x001C CLR_DATA GPIO Clear Data Register
0x0020 IN_DATA GPIO Input Data Register
0x0024 SET_RIS_TRIG GPIO Set Rising Edge Interrupt Register
0x0028 CLR_RIS_TRIG GPIO Clear Rising Edge Interrupt Register
0x002C SET_FAL_TRIG GPIO Set Falling Edge Interrupt Register
0x0030 CLR_FAL_TRIG GPIO Clear Falling Edge Interrupt Register
0x008C - Reserved
0x0090 - 0x03FF - Reserved
11.22.3 GPIO Electrical Data/Timing
Table 11-63. GPIO Input Timing Requirements
(1)
(see Figure 11-58)
NO. MIN MAX UNIT
1 t
w(GPOH)
Pulse duration, GPOx high 12C ns
2 t
w(GPOL)
Pulse duration, GPOx low 12C ns
(1) C = 1/SYSCLK1 clock frequency in ns
Table 11-64. GPIO Output Switching Characteristics
(1)
(see Figure 11-58)
NO. PARAMETER MIN MAX UNIT
3 t
w(GPOH)
Pulse duration, GPOx high 36C - 8 ns
4 t
w(GPOL)
Pulse duration, GPOx low 36C - 8 ns
(1) C = 1/SYSCLK1 clock frequency in ns
274 66AK2L06 Peripheral Information and Electrical Specifications Copyright © 2015, Texas Instruments Incorporated
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