66AK2L06
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SPRS930 –APRIL 2015
6.3 Terminal Functions
The terminal functions table (Table 6-2) identifies the external signal names, the associated pin (ball)
numbers, the pin type (I, O/Z, or I/O/Z), whether the pin has any internal pullup/pulldown resistors, and
gives functional pin descriptions. This table is arranged by function. The power terminal functions table
(Table 6-3) lists the various power supply pins and ground pins and gives functional pin descriptions.
Table 6-4 shows all pins arranged by signal name. Some pins have additional functions beyond their
primary functions. There are pins that have a secondary function and pins that have a bootstrap function.
Secondary functions are indicated with a superscript 2 (
2
), and bootstrap functions are indicated with a
superscript B (
B
).
Table 6-5 shows all pins arranged by ball number.
For more detailed information on device configuration, peripheral selection, multiplexed/shared pins, and
pullup/pulldown resistors, see Section 9.2.
Use the symbol definitions in Table 6-1 when reading Table 6-2.
Table 6-1. I/O Functional Symbol Definitions
FUNCTIONAL Table 6-2 COLUMN
SYMBOL DEFINITION HEADING
Internal 100-µA pulldown or pullup is provided for this terminal. In most systems, a 1-kΩ
resistor can be used to oppose the IPD/IPU.
IPD or IPU IPD/IPU
For more detailed information on pulldown/pullup resistors and situations in which external
pulldown/pullup resistors are required, see the Hardware Design Guide for KeyStone II
Devices application report SPRABV0.
A Analog signal Type
GND Ground Type
I Input terminal Type
O Output terminal Type
P Power supply voltage Type
Z Three-state terminal or high impedance Type
Table 6-2. Terminal Functions — Signals and Control by Function
BALL
SIGNAL NAME NO. TYPE IPD/IPU DESCRIPTION
AVS Interface
J2 IOZ Down
AVSIFSEL0
B
AVS interface select 0 (
B
pin is a secondary function and is shared with TIMI0)
J1 IOZ Down
AVSIFSEL1
B
AVS interface select 1 (
B
pin is a secondary function and is shared with TIMI1)
Common Serial Interface
J3 IOZ Up
CSISC2_0_CLKCTL
B
Selection of reference clock sharing scheme for CSISC2_0 and CSISC2_1 (
B
pin is a secondary function
and is shared with TIMO1)
H3 IOZ Down
CSISC2_0_MUX
B
Selection between AIL and JESD (
B
pin is a secondary function and is shared with TIMO0)
K26 IOZ Down
CSISC2_3_MUX
B
Selection between SGMII and PCIe (
B
pin is a secondary function and is shared with GPIO16)
Boot Configuration Pins
F27 IOZ Down
BOOTMODE00
B
F26 IOZ Down
BOOTMODE01
B
G29 IOZ Down
BOOTMODE02
B
F28 IOZ Down
BOOTMODE03
B
User-defined boot mode pins. (
B
pins are secondary functions and are shared with GPIO[01:08])
G27 IOZ Down
BOOTMODE04
B
H30 IOZ Down
BOOTMODE05
B
J26 IOZ Down
BOOTMODE06
B
H26 IOZ Down
BOOTMODE07
B
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