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66AK2L06

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型号: 66AK2L06
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  • 66AK2L06 PDF文件
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功能描述: 66AK2L06 Multicore DSPARM KeyStone II System-on-Chip (SoC)
PDF文件大小: 1516.59 Kbytes
PDF页数: 共298页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
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120%
66AK2L06
www.ti.com
SPRS930 APRIL 2015
11.17 Security Accelerator
The Security Accelerator (SA) provides wire-speed processing on 1 Gbps Ethernet traffic on IPSec and
SRTP security protocols. It functions on the packet level with the packet and the associated security
context being one of the above two types. The Security Accelerator is coupled with the Network
Coprocessor, and receives the packet descriptor containing the security context in the buffer descriptor
and the data to be encrypted/decrypted in the linked buffer descriptor. For more information, see the
KeyStone II Architecture Security Accelerator 2 (SA2) for K2E and K2L Devices User's Guide (SPRUHZ1).
11.18 Network Coprocessor Gigabit Ethernet (GbE) Switch Subsystem
The gigabit Ethernet (GbE) switch subsystem provides an efficient interface between the device and the
networked community. The Ethernet Media Access Controller (EMAC) supports 10Base-T
(10 Mbits/second), and 100BaseTX (100 Mbps), in half- or full-duplex mode, and 1000BaseT (1000 Mbps)
in full-duplex mode, with hardware flow control and quality-of-service (QOS) support. The GbE switch
subsystem is coupled with the Network Coprocessor. For more information, see the Gigabit Ethernet
(GbE) Switch Subsystem (1 GB) User's Guide (SPRUGV9).
An address range is assigned to the 66AK2L06. Each individual device has a 48-bit MAC address and
consumes only one unique MAC address out of the range. There are two registers to hold these values,
MACID1[31:0] (32 bits) and MACID2[15:0] (16 bits) . The bits of these registers are defined as follows:
Figure 11-52. MACID1 Register (MMR Address 0x02620110)
31 0
MACID
R,+xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx
Legend: R = Read only; -x, value is indeterminate
Table 11-54. MACID1 Register Field Descriptions
Bit Field Description
31-0 MAC ID MAC ID. Lower 32 bits.
Figure 11-53. MACID2 Register (MMR Address 0x02620114)
31 24 23 18 17 16 15 0
CRC Reserved FLOW BCAST MACID
R+,cccc cccc R,+rr rrrr R,+z R,+y R,+xxxx xxxx xxxx xxxx
LEGEND: R = Read only; -x = value is indeterminate
Table 11-55. MACID2 Register Field Descriptions
Bit Field Description
31-24 Reserved Variable
23-18 Reserved 000000
17 FLOW MAC Flow Control
0 = Off
1 = On
16 BCAST Default m/b-cast reception
0 = Broadcast
1 = Disabled
15-0 MAC ID MAC ID. Upper 16 bits.
Copyright © 2015, Texas Instruments Incorporated 66AK2L06 Peripheral Information and Electrical Specifications 269
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