66AK2L06
SPRS930 –APRIL 2015
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9 Device Boot and Configuration
9.1 Device Boot
9.1.1 Boot Sequence
The boot sequence is a process by which the internal memory is loaded with program and data sections.
The boot sequence is started automatically after each power-on reset or warm reset.
The 66AK2L06 supports several boot processes that begins execution at the ROM base address, which
contains the bootloader code necessary to support various device boot modes. The boot processes are
software-driven and use the BOOTMODE[15:0] device configuration inputs to determine the software
configuration that must be completed. For more details on boot sequence see the KeyStone II Architecture
ARM Bootloader User's Guide (SPRUHJ3).
For 66AK2L06 devices, there are two types of booting: the C66x CorePac as the boot master and the
ARM CorePac as the boot master. The ARM CorePac does not support no-boot mode. Both the C66x
CorePacs and the ARM CorePac need to read the bootmode register to determine how to proceed with
the boot.
Table 9-1 shows memory space reserved for boot by the C66x CorePac.
Table 9-1. C66x DSP Boot RAM Memory Map
START ADDRESS SIZE DESCRIPTION
0x80_0000 0x1_0000 Reserved
0x8e_7f80 0x80 C66x CorePac ROM version string
0x8e_8000 0x7f00 Ethernet Package memory
0x8e_fe80 0x7e80 PCIe config block
0x8e_fff0 4 Host Data Address (boot magic address for secure boot through master
peripherals)
0x8f_7800 0x410 Secure host Data structure
0x8f_a290 0x4000 Boot Stack
0x8f_e290 0x90 Boot Log Data
0x8f_e320 0x20 Boot Status Stack
0x8f_e410 0xf0 Boot Stats
0x8f_e520 0x13fc Boot Data
0x8f_f91c 0x404 Boot Trace Info
0x8f_fd20 0x180 DDR Config
0x8f_fea0 0x60 Boot RAM call table
0x8f_ff00 0x80 Boot Parameter table
0x8f_fff8 0x4 Secure Signal Magic address
0x8f_fffc 0x4 Boot Magic address
Table 9-2 shows addresses reserved for boot by the ARM CorePac.
Table 9-2. ARM Boot RAM Memory Map
START ADDRESS SIZE DESCRIPTION
0x0c1d_8000 0x180 ARM0 Version info
0x0c1d_0180 0x80 ARM0 Boot progress stack
0x0c1d_0200 0x100 ARM0 Boot stats
0x0c1d_0300 0x100 ARM0 Boot Log data
0x0c1d_0400 0x100 ARM0 RAM Call tables
0x0c1d_0500 0x100 RAM0 Boot Parameter tables
0x0c1d_0600 0x99e0 ARM0 Local core Boot data
156 Device Boot and Configuration Copyright © 2015, Texas Instruments Incorporated
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