66AK2L06
SPRS930 –APRIL 2015
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Table 7-26. CIC0 Registers (continued)
ADDRESS
OFFSET REGISTER MNEMONIC REGISTER NAME
0x390 ENABLE_CLR_REG4 Enable Clear Register 4
0x394 ENABLE_CLR_REG5 Enable Clear Register 5
0x398 ENABLE_CLR_REG6 Enable Clear Register 6
0x39C ENABLE_CLR_REG7 Enable Clear Register 7
0x3A0 ENABLE_CLR_REG8 Enable Clear Register 8
0x3A4 ENABLE_CLR_REG9 Enable Clear Register 9
0x3A8 ENABLE_CLR_REG10 Enable Clear Register 10
0x3AC ENABLE_CLR_REG11 Enable Clear Register 11
0x3B0 ENABLE_CLR_REG12 Enable Clear Register 12
0x3B4 ENABLE_CLR_REG13 Enable Clear Register 13
0x3B8 ENABLE_CLR_REG14 Enable Clear Register 14
0x38C ENABLE_CLR_REG15 Enable Clear Register 15
0x400 CH_MAP_REG0 Interrupt Channel Map Register for 0 to 0+3
0x404 CH_MAP_REG1 Interrupt Channel Map Register for 4 to 4+3
0x408 CH_MAP_REG2 Interrupt Channel Map Register for 8 to 8+3
0x40C CH_MAP_REG3 Interrupt Channel Map Register for 12 to 12+3
0x410 CH_MAP_REG4 Interrupt Channel Map Register for 16 to 16+3
0x414 CH_MAP_REG5 Interrupt Channel Map Register for 20 to 20+3
0x418 CH_MAP_REG6 Interrupt Channel Map Register for 24 to 24+3
0x41C CH_MAP_REG7 Interrupt Channel Map Register for 28 to 28+3
0x420 CH_MAP_REG8 Interrupt Channel Map Register for 32 to 32+3
0x424 CH_MAP_REG9 Interrupt Channel Map Register for 36 to 36+3
0x428 CH_MAP_REG10 Interrupt Channel Map Register for 40 to 40+3
0x42C CH_MAP_REG11 Interrupt Channel Map Register for 44 to 44+3
0x430 CH_MAP_REG12 Interrupt Channel Map Register for 48 to 48+3
0x434 CH_MAP_REG13 Interrupt Channel Map Register for 52 to 52+3
0x438 CH_MAP_REG14 Interrupt Channel Map Register for 56 to 56+3
0x43C CH_MAP_REG15 Interrupt Channel Map Register for 60 to 60+3
0x440 CH_MAP_REG16 Interrupt Channel Map Register for 64 to 64+3
0x444 CH_MAP_REG17 Interrupt Channel Map Register for 68 to 68+3
0x448 CH_MAP_REG18 Interrupt Channel Map Register for 72 to 72+3
0x44C CH_MAP_REG19 Interrupt Channel Map Register for 76 to 76+3
0x450 CH_MAP_REG20 Interrupt Channel Map Register for 80 to 80+3
0x454 CH_MAP_REG21 Interrupt Channel Map Register for 84 to 84+3
0x458 CH_MAP_REG22 Interrupt Channel Map Register for 88 to 88+3
0x45C CH_MAP_REG23 Interrupt Channel Map Register for 92 to 92+3
0x460 CH_MAP_REG24 Interrupt Channel Map Register for 96 to 96+3
0x464 CH_MAP_REG25 Interrupt Channel Map Register for 100 to 100+3
0x468 CH_MAP_REG26 Interrupt Channel Map Register for 104 to 104+3
0x46C CH_MAP_REG27 Interrupt Channel Map Register for 108 to 108+3
0x470 CH_MAP_REG28 Interrupt Channel Map Register for 112 to 112+3
0x474 CH_MAP_REG29 Interrupt Channel Map Register for 116 to 116+3
0x478 CH_MAP_REG30 Interrupt Channel Map Register for 120 to 120+3
0x47C CH_MAP_REG31 Interrupt Channel Map Register for 124 to 124+3
0x480 CH_MAP_REG32 Interrupt Channel Map Register for 128 to 128+3
0x484 CH_MAP_REG33 Interrupt Channel Map Register for 132 to 132+3
0x488 CH_MAP_REG34 Interrupt Channel Map Register for 136 to 136+3
118 Memory, Interrupts, and EDMA for 66AK2L06 Copyright © 2015, Texas Instruments Incorporated
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