66AK2E05, 66AK2E02
SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
www.ti.com
Table 7-23. System Event Mapping — ARM CorePac Interrupts (continued)
EVENT NO. EVENT NAME DESCRIPTION
359 SR_0_PO_VCON_SMPSERR_INT SmartReflex SMPS error interrupt
360 SR_0_SMARTREFLEX_INTREQ0 SmartReflex controller interrupt
361 SR_0_SMARTREFLEX_INTREQ1 SmartReflex controller interrupt
362 SR_0_SMARTREFLEX_INTREQ2 SmartReflex controller interrupt
363 SR_0_SMARTREFLEX_INTREQ3 SmartReflex controller interrupt
364 SR_0_VPNOSMPSACK SmartReflex VPVOLTUPDATE has been asserted, but SMPS has not been
responded to in a defined time interval
365 SR_0_VPEQVALUE SmartReflex SRSINTERUPT is asserted, but the new voltage is not different
from the current SMPS voltage
366 SR_0_VPMAXVDD SmartReflex. The new voltage required is equal to or greater than MaxVdd
367 SR_0_VPMINVDD SmartReflex. The new voltage required is equal to or less than MinVdd
368 SR_0_VPINIDLE SmartReflex indicating that the FSM of voltage processor is in idle
369 SR_0_VPOPPCHANGEDONE SmartReflex indicating that the average frequency error is within the desired
limit
370 SR_0_VPSMPSACK SmartReflex VPVOLTUPDATE asserted and SMPS has acknowledged in a
defined time interval
371 SR_0_SR_TEMPSENSOR SmartReflex temperature threshold crossing interrupt
372 SR_0_SR_TIMERINT SmartReflex internal timer expiration interrupt
373 PCIE_1_INT0 PCIE1 legacy INTA interrupt
374 PCIE_1_INT1 PCIE1 legacy INTB interrupt
375 PCIE_1_INT2 PCIE1 legacy INTC interrupt
376 PCIE_1_INT3 PCIE1 legacy INTD interrupt
377 PCIE_1_INT4 PCIE1 MSI interrupt
378 PCIE_1_INT5 PCIE1 MSI interrupt
379 PCIE_1_INT6 PCIE1 MSI interrupt
380 PCIE_1_INT7 PCIE1 MSI interrupt
381 PCIE_1_INT8 PCIE1 MSI interrupt
382 PCIE_1_INT9 PCIE1 MSI interrupt
383 PCIE_1_INT10 PCIE1 MSI interrupt
384 PCIE_1_INT11 PCIE1 MSI interrupt
385 PCIE_1_INT12 PCIE1 error interrupt
386 PCIE_1_INT13 PCIE1 power management interrupt
387 HYPERLINK_0_INT HyperLink interrupt
388 DDR3_ERR DDR3 interrupt
389 ARM_NCTIIRQ0 ARM cross trigger (CTI) IRQ interrupt
390 ARM_NCTIIRQ1 ARM cross trigger (CTI) IRQ interrupt
391 ARM_NCTIIRQ2 ARM cross trigger (CTI) IRQ interrupt
392 ARM_NCTIIRQ3 ARM cross trigger (CTI) IRQ interrupt
393 Reserved Reserved
394 Reserved Reserved
395 Reserved Reserved
396 Reserved Reserved
397 Reserved Reserved
398 Reserved Reserved
399 Reserved Reserved
400 Reserved Reserved
401 Reserved Reserved
402 10GbE_LINK_INT0 10 Gigabit Ethernet subsystem MDIO interrupt
96 Memory, Interrupts, and EDMA for 66AK2E0x Copyright © 2012–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: 66AK2E05 66AK2E02
