66AK2E05, 66AK2E02
SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
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Table 7-16. MPU6-MPU11 Programmable Range n End Address Register (PROGn_MPEAR) Reset Values
REGISTER MPU6 MPU7 MPU8 MPU9 MPU10 MPU11
PROG0_MPEAR Reserved 0x2103_FFFF 0x31FF_FFFF 0x0260_1FFF 0x0264_07FF 0x022F_027F
PROG1_MPEAR Reserved 0x07FF_FFFF 0x33FF_FFFF 0x0260_5FFF 0x0000_0000 0x0231_01FF
PROG2_MPEAR Reserved 0x0FFF_FFFF 0x35FF_FFFF 0x0260_9FFF N/A 0x0232_FFFF
PROG3_MPEAR Reserved 0x17FF_FFFF 0x37FF_FFFF 0x0257_FFFF N/A 0x0233_07FF
PROG4_MPEAR Reserved 0x1FFF_FFFF 0x39FF_FFFF 0x0000_0000 N/A 0x0235_0FFF
PROG5_MPEAR Reserved 0x27FF_FFFF 0x3BFF_FFFF 0x0000_0000 N/A 0x0263_FFFF
PROG6_MPEAR Reserved 0x2FFF_FFFF 0x3FFF_FFFF 0x0000_0000 N/A 0x024B_3FFF
PROG7_MPEAR Reserved 0x37FF_FFFF 0x2100_0AFF 0x0000_0000 N/A 0x024C_0BFF
PROG8_MPEAR Reserved 0x3FFF_FFFF N/A 0x0000_0000 N/A 0x0250_7FFF
PROG9_MPEAR Reserved 0x47FF_FFFF N/A 0x0000_0000 N/A 0x0253_0BFF
PROG10_MPEAR Reserved 0x4FFF_FFFF N/A 0x0000_0000 N/A 0x0253_FFFF
PROG11_MPEAR Reserved 0x57FF_FFFF N/A 0x0000_0000 N/A 0x0260_BFFF
PROG12_MPEAR Reserved 0x5FFF_FFFF N/A 0x0000_0000 N/A 0x0262_0FFF
PROG13_MPEAR Reserved 0x67FF_FFFF N/A 0x0000_0000 N/A 0x03FF_FFFF
PROG14_MPEAR Reserved 0x6FFF_FFFF N/A 0x0000_0000 N/A 0x021E_1FFF
PROG15_MPEAR Reserved 0x7FFF_FFFF N/A 0x0000_0000 N/A 0x026F_FFFF
Table 7-17. MPU12-MPU15 Programmable Range n End Address Register (PROGn_MPEAR) Reset Values
REGISTER MPU12 MPU13 MPU14 MPU15
PROG0_MPEAR 0x2100_07FF 0x2100_07FF 0x2100_0AFF 0x2407_FFFF
PROG1_MPEAR 0x0000_0000 0x0000_0000 0x0000_0000 0x240F_FFFF
PROG2_MPEAR N/A N/A N/A 0x24FF_FFFF
PROG3_MPEAR N/A N/A N/A 0x2507_FFFF
PROG4_MPEAR N/A N/A N/A 0x2508FFFF
PROG5_MPEAR N/A N/A N/A 0x0000_0000
PROG6_MPEAR N/A N/A N/A 0x0000_0000
PROG7_MPEAR N/A N/A N/A 0x0000_0000
PROG8_MPEAR N/A N/A N/A N/A
PROG9_MPEAR N/A N/A N/A N/A
PROG10_MPEAR N/A N/A N/A N/A
PROG11_MPEAR N/A N/A N/A N/A
PROG12_MPEAR N/A N/A N/A N/A
PROG13_MPEAR N/A N/A N/A N/A
PROG14_MPEAR N/A N/A N/A N/A
PROG15_MPEAR N/A N/A N/A N/A
7.2.2.3 Programmable Range n Memory Protection Page Attribute Register (PROGn_MPPAR)
The programmable address memory protection page attribute register holds the permissions for the
region. This register is writeable only by a non-debug supervisor entity. If NS = 0 (secure mode) then the
register is also writeable only by a non-debug secure entity. The NS bit is writeable only by a non-debug
secure entity. For debug accesses, the register is writeable only when NS = 1 or EMU = 1.
80 Memory, Interrupts, and EDMA for 66AK2E0x Copyright © 2012–2015, Texas Instruments Incorporated
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