66AK2E05, 66AK2E02
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SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
Table 11-21. Reset Type Status Register Field Descriptions
Bit Field Description
31-29 Reserved Reserved. Always reads as 0. Writes have no effect.
28 EMU-RST Reset initiated by emulation
• 0 = Not the last reset to occur
• 1 = The last reset to occur
27-12 Reserved Reserved. Always reads as 0. Writes have no effect.
11 WDRST3 Reset initiated by Watchdog Timer[N]
• 0 = Not the last reset to occur
10 WDRST2
• 1 = The last reset to occur
9 WDRST1
8 WDRST0
7-3 Reserved Reserved. Always reads as 0. Writes have no effect.
2 PLLCTLRST Reset initiated by PLLCTL
• 0 = Not the last reset to occur
• 1 = The last reset to occur
1 RESET RESET reset
• 0 = RESET was not the last reset to occur
• 1 = RESET was the last reset to occur
0 POR Power-on reset
• 0 = Power-on reset was not the last reset to occur
• 1 = Power-on reset was the last reset to occur
11.5.2.7 Reset Control Register (RSTCTRL)
This register contains a key that enables writes to the MSB of this register and the RSTCFG register. The
key value is 0x5A69. A valid key will be stored as 0x000C. Any other key value is invalid. When the
RSTCTRL or the RSTCFG is written, the key is invalidated. Every write must be set up with a valid key.
The Software Reset Control Register (RSTCTRL) is shown in Figure 11-14 and described in Table 11-22.
Figure 11-14. Reset Control Register (RSTCTRL)
31 17 16 15 0
Reserved SWRST KEY
R-0x0000 R/W-0x
(1)
R/W-0x0003
Legend: R = Read only; -n = value after reset;
(1) Writes are conditional based on valid key.
Table 11-22. Reset Control Register Field Descriptions
Bit Field Description
31-17 Reserved Reserved
16 SWRST Software reset
• 0 = Reset
• 1 = Not reset
15-0 KEY Key used to enable writes to RSTCTRL and RSTCFG.
11.5.2.8 Reset Configuration Register (RSTCFG)
This register is used to configure the type of reset (a hard reset or a soft reset) initiated by RESET, the
watchdog timer, and the Core PLL Controller’s RSTCTRL Register. By default, these resets are hard
resets. The Reset Configuration Register (RSTCFG) is shown in Figure 11-15 and described in Table 11-
23.
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