66AK2E05, 66AK2E02
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SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
11.5.1.5 Core PLL Stabilization, Lock, and Reset Times
The PLL stabilization time is the amount of time that must be allotted for the internal PLL regulators to
become stable after device power-up. The device should not be taken out of reset until this stabilization
time has elapsed.
The PLL reset time is the amount of wait time needed when resetting the PLL (writing PLLRST = 1), in
order for the PLL to properly reset, before bringing the PLL out of reset (writing PLLRST = 0). For the
Core PLL reset time value, see Table 11-14.
The PLL lock time is the amount of time needed from when the PLL is taken out of reset to when the PLL
Controller can be switched to PLL mode. The Core PLL lock time is given in Table 11-14.
Table 11-14. Core PLL Stabilization, Lock, and Reset Times
PARAMETER MIN TYP MAX UNIT
PLL stabilization time 100 µs
PLL lock time 2000 × C
(1)
PLL reset time 1000 ns
(1) C = SYSCLK1(N|P) cycle time in ns.
11.5.2 PLL Controller Memory Map
The memory map of the Core PLL Controller is shown in Table 11-15. 66AK2Exx-specific Core PLL
Controller Register definitions can be found in the sections following Table 11-15. For other registers in
the table, see the KeyStone Architecture Phase Locked Loop (PLL) Controller User's Guide (SPRUGV2).
It is recommended to use read-modify-write sequence to make any changes to the valid bits in the Core
PLL Controller registers.
Note that only registers documented here are accessible on the 66AK2Exx. Other addresses in the Core
PLL Controller memory map including the Reserved registers must not be modified. Furthermore, only the
bits within the registers described here are supported.
Table 11-15. PLL Controller Registers (Including Reset Controller)
HEX ADDRESS RANGE ACRONYM REGISTER NAME
00 0231 0000 - 00 0231 00E3 - Reserved
00 0231 00E4 RSTYPE Reset Type Status Register (Reset Core PLL Controller)
00 0231 00E8 RSTCTRL Software Reset Control Register (Reset Core PLL Controller)
00 0231 00EC RSTCFG Reset Configuration Register (Reset Core PLL Controller)
00 0231 00F0 RSISO Reset Isolation Register (Reset Core PLL Controller)
00 0231 00F0 - 00 0231 00FF - Reserved
00 0231 0100 PLLCTL PLL Control Register
00 0231 0104 - Reserved
00 0231 0108 SECCTL PLL Secondary Control Register
00 0231 010C - Reserved
00 0231 0110 PLLM PLL Multiplier Control Register
00 0231 0114 - Reserved
00 0231 0118 PLLDIV1 PLL Controller Divider 1Register
00 0231 011C PLLDIV2 PLL Controller Divider 2 Register
00 0231 0120 PLLDIV3 PLL Controller Divider 3Register
00 0231 0124 - Reserved
00 0231 0128 - Reserved
00 0231 012C - 00 0231 0134 - Reserved
00 0231 0138 PLLCMD PLL Controller Command Register
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