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66AK2E05XABD4

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型号: 66AK2E05XABD4
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功能描述: 66AK2E0x Multicore DSPARM KeyStone II System-on-Chip (SoC)
PDF文件大小: 1546.9 Kbytes
PDF页数: 共282页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
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120%
66AK2E05, 66AK2E02
SPRS865D NOVEMBER 2012REVISED MARCH 2015
www.ti.com
9.2.3.8 Reset Status Clear (RESET_STAT_CLR) Register
The RESET_STAT bits can be cleared by writing 1 to the corresponding bit in the RESET_STAT_CLR
register. The Reset Status Clear Register is shown in the figure and table below.
Figure 9-18. Reset Status Clear Register (RESET_STAT_CLR)
31 30 1 0
GR Reserved LR0
RW-0 R- 0 RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 9-34. Reset Status Clear Register Field Descriptions
Bit Field Description
31 GR Global reset clear bit
0 = Writing a 0 has no effect.
1 = Writing a 1 to the GR bit clears the corresponding bit in the RESET_STAT register.
30-1 Reserved Reserved.
0 LR0 C66x CorePac0 reset clear bit
0 = Writing a 0 has no effect.
1 = Writing a 1 to the LR0 bit clears the corresponding bit in the RESET_STAT register.
9.2.3.9 Boot Complete (BOOTCOMPLETE) Register
The BOOTCOMPLETE register controls the BOOTCOMPLETE pin status to indicate the completion of the
ROM booting process. The Boot Complete register is shown in the figure and table below.
Figure 9-19. Boot Complete Register (BOOTCOMPLETE)
31 12 11 10 9 8 7 1 0
Reserved BC11 BC10 BC9 BC8 Reserved BC0
R-0 RW-0 RW-0 RW-0 RW-0 R-0 RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 9-35. Boot Complete Register Field Descriptions
Bit Field Description
31-12 Reserved
11 BC11 ARM CorePac 3 boot status (66AK2E05 only)
0 = ARM CorePac 3 boot NOT complete
1 = ARM CorePac 3 boot complete
10 BC10 ARM CorePac 2 boot status (66AK2E05 only)
0 = ARM CorePac 2 boot NOT complete
1 = ARM CorePac 2 boot complete
9 BC9 ARM CorePac 1 boot status (66AK2E05 only)
0 = ARM CorePac 1 boot NOT complete
1 = ARM CorePac 1 boot complete
8 BC8 ARM CorePac 0 boot status
0 = ARM CorePac 0 boot NOT complete
1 = ARM CorePac 0 boot complete
7-1 Reserved
0 BC0 C66x CorePac0 boot status
0 = C66x CorePac 0 boot NOT complete
1 = C66x CorePac 0 boot complete
184 Device Boot and Configuration Copyright © 2012–2015, Texas Instruments Incorporated
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Product Folder Links: 66AK2E05 66AK2E02
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