66AK2E05, 66AK2E02
SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
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9.2.3.1 Device Status (DEVSTAT) Register
The Device Status Register depicts device configuration selected upon a power-on reset by the POR or
RESETFULL pin. Once set, these bits remain set until a power-on reset. The Device Status Register is
shown in the figure below.
Figure 9-12. Device Status Register
31 22 21 20 19 18 17 16 1 0
Reserved Reserved MAINPLLODSEL AVSIFSEL BOOTMODE LENDIAN
R-0 R/W-00 R/W-x R/W-xx R/W-x xxxx R-x
(1)
xxxx xxxx xxx
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
(1) x indicates the bootstrap value latched via the external pin
Table 9-28. Device Status Register Field Descriptions
Bit Field Description
31-22 Reserved Reserved
21-20 Reserved Reserved
19 MAINPLLODSEL Main PLL Output divider select
• 0 = Main PLL output divider needs to be set to 2 by BOOTROM
• 1 = Reserved
18-17 AVSIFSEL AVS interface selection
• 00 = AVS 4-pin 6-bit Dual-Phase VCNTL[5:2] (Default)
• 01 = AVS 4-pin 4-bit Single-Phase VCNTL[5:2]
• 10 = AVS 6-pin 6-bit Single-Phase VCNTL[5:0]
• 11 = Reserved
16-1 BOOTMODE Determines the bootmode configured for the device. For more information on bootmode, see Section 9.1.2.
See the KeyStone Architecture DSP Bootloader User Guide (SPRUGY5).
0 LENDIAN Device endian mode (LENDIAN) — shows the status of whether the system is operating in big endian mode or
little endian mode (default).
• 0 = System is operating in big endian mode
• 1 = System is operating in little endian mode (default)
9.2.3.2 Device Configuration Register
The Device Configuration Register is one-time writeable through software. The register is reset on all hard
resets and is locked after the first write. The Device Configuration Register is shown in Figure 9-13 and
described in Table 9-29.
Figure 9-13. Device Configuration Register (DEVCFG)
31 5 4 3 2 1 0
Reserved PCIE1SSMODE PCIE0SSMODE SYSCLKOUTEN
R-0 R/W-00 R/W-00 R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9-29. Device Configuration Register Field Descriptions
Bit Field Description
31-5 Reserved Reserved. Read only, writes have no effect.
4-3 PCIE1SSMODE Device Type Input of PCIe1SS
• 00 = Endpoint
• 01 = Legacy Endpoint
• 10 = Rootcomplex
• 11 = Reserved
180 Device Boot and Configuration Copyright © 2012–2015, Texas Instruments Incorporated
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