66AK2E05, 66AK2E02
SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
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Table 9-2. ARM Boot RAM Memory Map (continued)
START ADDRESS SIZE DESCRIPTION
0xc19_0000 0x7e80 Packet Memory Buffer
0xc19_7e80 080 PCIE Block
0xc19_7f00 4 Host Data Address (boot magic address for secure boot through master peripherals)
0xc1a_6e00 0x200 DDR3 Configuration Structure
0xc1a_7000 0x3000 Boot Data
0xc1a_a000 0x3000 Supervisor Stack, Each Core Gets 0xc000 Bytes
0xc1a_d000 4 ARM Boot Magic Address, Core 0
0xc1a_d004 4 ARM Boot Magic Address, Core 1
0xc1a_d008 4 ARM Boot Magic Address, Core 2
0xc1a_d00c 4 ARM Boot Magic Address, Core 3
0xc1a_e000 0x400 Abort Stack, Core 0
0xc1a_e400 0x400 Abort Stack, Core 1
0xc1a_e800 0x400 Abort Stack, Core 2
0xc1a_ec00 0x400 Abort Stack, Core 3
0xc1a_f000 0x400 Unknown Mode Stack, Core 0
0xc1a_f400 0x400 Unknown mOde Stack, Core 1
0xc1a_f800 0x400 Unknown Mode Stack, Core 2
0xc1a_fc00 0x400 Unknown Mode Stack, Core 3
0xc1b_0000 0x180 Boot Version String, Core 0
0xc1b_0180 0x80 Boot Status Stack, Core 0
0xc1b_0200 0x100 Boot Stats, Core 0
0xc1b_0300 0x100 Boot Log, Core 0
0xc1b_0400 0x100 Boot RAM Call Table, Core 0
0xc1b_0500 0x100 Boot Parameter Tables, Core 0
0xc1b_0600 0x19e0 Boot Data, Core 0
0xc1b_1fe0 0x1010 Boot Trace, Core 0
0xc1b_4000 0x180 Boot Version String, Core 1
0xc1b_4180 0x80 Boot Status Stack, Core 1
0xc1b_4200 0x100 Boot Stats, Core 1
0xc1b_4300 0x100 Boot Log, Core 1
0xc1b_4400 0x100 Boot RAM Call Table, Core 1
0xc1b_4500 0x100 Boot Parameter Tables, Core 1
0xc1b_4600 0x19e0 Boot Data, Core 1
0xc1b_5fe0 0x1010 Boot Trace, Core 1
0xc1b_6000 0x180 Boot Version String, Core 2
0xc1b_6180 0x80 Boot Status Stack, Core 2
0xc1b_6200 0x100 Boot Stats, Core 2
0xc1b_6300 0x100 Boot Log, Core 2
0xc1b_6400 0x100 Boot RAM Call Table, Core 2
0xc1b_6500 0x100 Boot Parameter Tables, Core 2
0xc1b_6600 0x19e0 Boot Data, Core 2
0xc1b_7fe0 0x1010 Boot Trace, Core 2
0xc1b_8000 0x180 Boot Version String, Core 3
0xc1b_8180 0x80 Boot Status Stack, Core 3
0xc1b_8200 0x100 Boot Stats, Core 3
0xc1b_8300 0x100 Boot Log, Core 3
0xc1b_8400 0x100 Boot RAM Call Table, Core 3
156 Device Boot and Configuration Copyright © 2012–2015, Texas Instruments Incorporated
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