66AK2E05, 66AK2E02
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SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
Table 7-25. CIC2 Event Inputs (Secondary Events for EDMA3CC and Hyperlink) (continued)
EVENT NO. EVENT NAME DESCRIPTION
191 Reserved Reserved
192 Reserved Reserved
193 Reserved Reserved
194 Reserved Reserved
195 Reserved Reserved
196 Reserved Reserved
197 Reserved Reserved
198 Reserved Reserved
199 TRACER_QMSS_QM_CFG2_INT Tracer sliding time window interrupt for Navigator CFG2 slave port
200 TRACER_EDMACC_0 Tracer sliding time window interrupt foR EDMA3CC0
201 TRACER_EDMACC_123_INT Tracer sliding time window interrupt for EDMA3CC1, EDMA3CC2, and
EDMA3CC3
202 TRACER_CIC_INT Tracer sliding time window interrupt for interrupt controllers (CIC)
203 Reserved Reserved
204 MPU_5_INT MPU5 addressing violation interrupt and protection violation interrupt
205 Reserved Reserved
206 MPU_7_INT MPU7 addressing violation interrupt and protection violation interrupt
207 MPU_8_INT MPU8 addressing violation interrupt and protection violation interrupt
208 Reserved Reserved
209 Reserved Reserved
210 Reserved Reserved
211 DDR3_0_ERR DDR3 error interrupt
212 HYPERLINK_0_INT HyperLink interrupt
213 EDMACC_0_ERRINT EDMA3CC0 error interrupt
214 EDMACC_0_MPINT EDMA3CC0 memory protection interrupt
215 EDMACC_0_TC_0_ERRINT EDMA3CC0 TPTC0 error interrupt
216 EDMACC_0_TC_1_ERRINT EDMA3CC0 TPTC1 error interrupt
217 EDMACC_1_ERRINT EDMA3CC1 error interrupt
218 EDMACC_1_MPINT EDMA3CC1 memory protection interrupt
219 EDMACC_1_TC_0_ERRINT EDMA3CC1 TPTC0 error interrupt
220 EDMACC_1_TC_1_ERRINT EDMA3CC1 TPTC1 error interrupt
221 EDMACC_1_TC_2_ERRINT EDMA3CC1 TPTC2 error interrupt
222 EDMACC_1_TC_3_ERRINT EDMA3CC1 TPTC3 error interrupt
223 EDMACC_2_ERRINT EDMA3CC2 error interrupt
224 EDMACC_2_MPINT EDMA3CC2 memory protection interrupt
225 EDMACC_2_TC_0_ERRINT EDMA3CC2 TPTC0 error interrupt
226 EDMACC_2_TC_1_ERRINT EDMA3CC2 TPTC1 error interrupt
227 EDMACC_2_TC_2_ERRINT EDMA3CC2 TPTC2 error interrupt
228 EDMACC_2_TC_3_ERRINT EDMA3CC2 TPTC3 error interrupt
229 EDMACC_3_ERRINT EDMA3CC3 error interrupt
230 EDMACC_3_MPINT EDMA3CC3 memory protection interrupt
231 EDMACC_3_TC_0_ERRINT EDMA3CC3 TPTC0 error interrupt
232 EDMACC_3_TC_1_ERRINT EDMA3CC3 TPTC1 error interrupt
233 EDMACC_4_ERRINT EDMA3CC4 error interrupt
234 EDMACC_4_MPINT EDMA3CC4 memory protection interrupt
235 EDMACC_4_TC_0_ERRINT EDMA3CC4 TPTC0 error interrupt
236 EDMACC_4_TC_1_ERRINT EDMA3CC4 TPTC1 error interrupt
237 QMSS_QUE_PEND_652 Navigator transmit queue pending event for indicated queue
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