66AK2E05, 66AK2E02
SPRS865D –NOVEMBER 2012–REVISED MARCH 2015
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Table 7-24. CIC0 Event Inputs — C66x CorePac Secondary Interrupts (continued)
EVENT NO. EVENT NAME DESCRIPTION
434 TIMER_12_INTH Timer interrupt high
435 TIMER_13_INTL Timer interrupt low
436 TIMER_13_INTH Timer interrupt high
437 TIMER_14_INTL Timer interrupt low
438 TIMER_14_INTH Timer interrupt high
439 TIMER_15_INTL Timer interrupt low
440 TIMER_15_INTH Timer interrupt high
441 Reserved Reserved
442 Reserved Reserved
443 Reserved Reserved
444 Reserved Reserved
445 Reserved Reserved
446 GPIO_INT16 GPIO interrupt
447 GPIO_INT17 GPIO interrupt
448 GPIO_INT18 GPIO interrupt
449 GPIO_INT19 GPIO interrupt
450 GPIO_INT20 GPIO interrupt
451 GPIO_INT21 GPIO interrupt
452 GPIO_INT22 GPIO interrupt
453 GPIO_INT23 GPIO interrupt
454 GPIO_INT24 GPIO interrupt
455 GPIO_INT25 GPIO interrupt
456 GPIO_INT26 GPIO interrupt
457 GPIO_INT27 GPIO interrupt
458 GPIO_INT28 GPIO interrupt
459 GPIO_INT29 GPIO interrupt
460 GPIO_INT30 GPIO interrupt
461 GPIO_INT31 GPIO interrupt
462 PCIE_0_INT8 PCIE0 MSI interrupt
463 PCIE_0_INT9 PCIE0 MSI interrupt
464 PCIE_0_INT10 PCIE0 MSI interrupt
465 PCIE_0_INT11 PCIE0 MSI interrupt
466 PCIE_0_INT4 PCIE0 MSI interrupt
467 PCIE_0_INT5 PCIE0 MSI interrupt
468 PCIE_0_INT6 PCIE0 MSI interrupt
469 PCIE_0_INT7 PCIE0 MSI interrupt
470 SEM_INT12 Semaphore interrupt
471 Reserved Reserved
472 SEM_ERR12 Semaphore error interrupt
473 Reserved Reserved
Table 7-25 lists the CIC2 event inputs.
Table 7-25. CIC2 Event Inputs (Secondary Events for EDMA3CC and Hyperlink)
EVENT NO. EVENT NAME DESCRIPTION
0 GPIO_INT8 GPIO interrupt
1 GPIO_INT9 GPIO interrupt
2 GPIO_INT10 GPIO interrupt
108 Memory, Interrupts, and EDMA for 66AK2E0x Copyright © 2012–2015, Texas Instruments Incorporated
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