Document No. 008-0328-0 Page 3 - 4 Rev. A
٠ ٠ ٠ CTS Electronic Components, Inc. ٠ 171 Covington Drive ٠ Bloomingdale, IL 60108 ٠ ٠ ٠
Model 632
3.2x2.5mm Low Cost
HCMOS/TTL Clock Oscillator
MECHANICAL SPECIFICATIONS
CMOS/TTL OUTPUT WAVEFORM TEST CIRCUIT, CMOS LOAD
PERIOD (T)
90%, 80%, 2.4V
50%, 1.5V
10%, 20%, 0.5V
DUTY CYCLE = t/T x 100 (%)
V
V
OH
OL
Tr Tf
UPTIME (t)
POWER
SUPPLY
+
-
+-
-
+
VM
mA
.01uF
D.U.T.
43
12
C
L
Including probe
capacitance.
Enable Input
ENABLE TRUTH TABLE
PIN 1 PIN 3
Logic ‘1’ Output
Open Output
Logic ‘0’ High Imp.
D.U.T. PIN ASSIGNMENTS
PIN SYMBOL DESCRIPTION
1 EOH Enable Input
2 GND Circuit & Package Ground
3 Output RF Output
4 V
CC
Supply Voltage
SUGGESTED SOLDER PAD GEOMETR
PACKAGE DRAWING
.037 [0.95]
.087 [2.20]
1
BYPASSC
4
.065 [1.65]
2
Inch
[mm]
Key:
.047 [1.20]
3
C
BYPASS
should be ≥ 0.01 uF.
( 0.90 )
0.026
( 0.65 )
0.035
( 2.10 )
0.083
0.065
( 1.65 )
21
43
( 1.00 ±0.20 )
( 3.20 ±0.20 )
0.126 ±0.008
0.047 ±0.008
( 2.50 ±0.20 )
0.098 ±0.008
Key:
( MM )
Inch
XX.XX
C**D
MARKING INFORMATION
1. XX.XX – Frequency in MHz.
2. C – CTS and Pin 1 identifier.
3. ** – Manufacturing Site Code.
4. D – Manufactured Date Code. See Table I
for codes.
NOTES
1. Termination pads (e4), barrier-plating is
nickel (Ni) with gold (Au) flash plate.
2. Reflow conditions per JEDEC J-STD-020.