BCRTM-22
1553 BUS
BUS B
BUS A
XFMRXFMR
DUAL
TRANSCEIVER
MEMORY
ARBITRATION
CONTROL
ADDRESS
DATA
BCRTM CPU
RAM
BUFFER
Figure 3d. CPU/BCRTM Interface -- DMA Configuration
BCRTM
CPU
SHARED
MEMORY
AREA
•
•
•
ADDRESS BUS
DATA BUS
Figure 3c. DMA Signals
OE
WE
CS
DMAR DMAG DMACK
RRD RWR MEMCSO