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5962F9863501VXC

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型号: 5962F9863501VXC
PDF文件:
  • 5962F9863501VXC PDF文件
  • 5962F9863501VXC PDF在线浏览
功能描述: Radiation Hardened Quad D-Type Flip- Flop with Reset
PDF文件大小: 39.21 Kbytes
PDF页数: 共2页
制造商: INTERSIL[Intersil Corporation]
制造商LOGO: INTERSIL[Intersil Corporation] LOGO
制造商网址: http://www.intersil.com/cda/home
捡单宝5962F9863501VXC
PDF页面索引
120%
1
File Number 4763
ACS175MS
Radiation Hardened Quad D-Type Flip-
Flop with Reset
The Radiation Hardened ACS175MS is a Quad D-Type
Flip-Flop with Reset. Information at the D input is
transferred to the Q and
Q outputs on the positive-going
transition of the clock. All four flip-flops are controlled by a
common clock (CP) and a common reset (
MR). Resetting is
accomplished by a LOW level independent of the clock. All
inputs are buffered and the outputs are designed for
balanced propagation delay and transition times.
The ACS175MS is fabricated on a CMOS Silicon on
Sapphire (SOS) process, which provides an immunity to
Single Event Latch-up and the capability of highly reliable
performance in any radiation environment. These devices
offer significant power reduction and faster performance
when compared to ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS175MS are
contained in SMD 5962-98635. A “hot-link” is provided
on our homepage for downloading.
http://www .intersil.com/spacedefense/spaceselect.htm
Features
QML Qualified Per MIL-PRF-38535 Requirements
1.25 Micron Radiation Hardened SOS CMOS
Radiation Environment
- Latch-Up Free Under Any Conditions
- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU Immunity. . . . . . . . . . . . .<1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
2
)
Input Logic Levels. . . . V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA (Min)
Quiescent Supply Current . . . . . . . . . . . . . . . 10µA (Max)
Propagation Delay . . . . . . . . . . . . . . . . . . . . . .22ns (Max)
Applications
High Speed Control Circuits
Sensor Monitoring
Low Power Designs
Ordering Information
ORDERING NUMBER
INTERNAL MARKETING
NUMBER TEMP. RANGE (
o
C) PACKAGE DESIGNATOR
5962F9863501VCC ACS175DMSR-03 -55 to 125 16 Ld SBDIP CDIP2-T16
ACS175D/SAMPLE-03 ACS175D/SAMPLE-03 25 16 Ld SBDIP CDIP2-T16
5962F9863501VXC ACS175KMSR-03 -55 to 125 16 Ld Flatpack CDFP4-F16
ACS175K/SAMPLE-03 ACS175K/SAMPLE-03 25 16 Ld Flatpack CDFP4-F16
5962F9863501V9A ACS175HMSR-03 25 Die NA
Pinouts
ACS175MS
(SBDIP)
TOP VIEW
ACS175MS
(FLATPACK)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
MR
Q0
Q0
D0
D1
Q1
GND
Q1
V
CC
Q3
D3
D2
Q2
Q2
CP
Q3
MR
Q0
Q0
D0
D1
Q1
Q1
GND
2
3
4
5
6
7
8
116
15
14
13
12
11
10
9
V
CC
Q3
Q3
D3
D2
Q2
Q2
CP
Data Sheet July 1999
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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