XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
2-142
XC3064/XC3090/XC3195 84-Pin PLCC Pinouts
XC3000, XC3000A, XC3000L, XC3100 and XC3100A families have identical pinouts
PLCC
Pin Number XC3064, XC3090, XC3195
54
RESET
55 DONE-
PG
56 D7-I/O
57 XTL1(OUT)-BCLKIN-I/O
58 D6-I/O
59 I/O
60 D5-I/O
61
CS0-I/O
62 D4-I/O
63 I/O
64 VCC
65 GND
✶
66 D3-I/O✶
67 CS1-I/O✶
68 D2-I/O✶
69 I/O
70 D1-I/O
71 RDY/BUSY-RCLK-I/O
72 D0-DIN-I/O
73 DOUT-I/O
74 CCLK
75 A0-
WS-I/O
76 A1-CS2-I/O
77 A2-I/O
78 A3-I/O
79 I/O
80 I/O
81 A15-I/O
82 A4-I/O
83 A14-I/O
84 A5-I/O
1 GND
2 VCC
✶
3 A13-I/O✶
4 A6-I/O✶
5 A12-I/O✶
6 A7-I/O✶
7 I/O
8 A11-I/O
9 A8-I/O
10 A10-I/O
11 A9-I/O
PLCC
Pin Number XC3064, XC3090, XC3195
12
PWRDN
13 TCLKIN-I/O
14 I/O
15 I/O
16 I/O
17 I/O
18 I/O
19 I/O
20 I/O
21 GND
✶
22 VCC
23 I/O
24 I/O
25 I/O
26 I/O
27 I/O
28 I/O
29 I/O
30 I/O
31 M1-
RDATA
32 M0-RTRIG
33 M2-I/O
34 HDC-I/O
35 I/O
36
LDC-I/O
37 I/O
38 I/O
39 I/O
40 I/O
41 INIT/I/O
✶
42 VCC✶
43 GND
44 I/O
45 I/O
46 I/O
47 I/O
48 I/O
49 I/O
50 I/O
51 I/O
52 I/O
53 XTL2(IN)-I/O
Unprogrammed IOBs have a default pull-up. This prevents an undefined pad level for unbonded or unused IOBs. Programmed
ouptuts are default slew-rate limited.
In the PC84 package, XC3064, XC3090 and XC3195 have additional V
CC
and GND pins and thus a different pin definition than
XC3020/XC3030/XC3042.
✶
