DS529 August 19, 2010 www.xilinx.com 1
Product Specification
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other countries. PCI is a registered trademark of the PCI-SIG. All other trademarks are the property of their respective owners.
Module 1:
Introduction and Ordering Information
DS529-1 (v2.0) August 19, 2010
• Introduction
• Features
• Architectural and Configuration Overview
• General I/O Capabilities
• Production Status
• Supported Packages and Package Marking
• Ordering Information
Module 2:
Spartan-3A FPGA Family: Functional
Description
DS529-2 (v2.0) August 19, 2010
The functionality of the Spartan®-3A FPGA family is
described in the following documents.
• UG331: Spartan-3 Generation FPGA User Guide
• Clocking Resources
• Digital Clock Managers (DCMs)
•Block RAM
• Configurable Logic Blocks (CLBs)
- Distributed RAM
- SRL16 Shift Registers
- Carry and Arithmetic Logic
•I/O Resources
• Embedded Multiplier Blocks
• Programmable Interconnect
• ISE® Design Tools and IP Cores
• Embedded Processing and Control Solutions
• Pin Types and Package Overview
• Package Drawings
• Powering FPGAs
• Power Management
• UG332
: Spartan-3 Generation Configuration User Guide
• Configuration Overview
• Configuration Pins and Behavior
• Bitstream Sizes
• Detailed Descriptions by Mode
- Master Serial Mode using Platform Flash PROM
- Master SPI Mode using Commodity Serial Flash
- Master BPI Mode using Commodity Parallel Flash
- Slave Parallel (SelectMAP) using a Processor
- Slave Serial using a Processor
-JTAG Mode
• ISE iMPACT Programming Examples
• MultiBoot Reconfiguration
• Design Authentication using Device DNA
• UG33
4: Spartan-3A/3AN FPGA Starter Kit User Guide
Module 3:
DC and Switching Characteristics
DS529-3 (v2.0) August 19, 2010
• DC Electrical Characteristics
• Absolute Maximum Ratings
• Supply Voltage Specifications
• Recommended Operating Conditions
• Switching Characteristics
• I/O Timing
• Configurable Logic Block (CLB) Timing
• Multiplier Timing
•Block RAM Timing
• Digital Clock Manager (DCM) Timing
• Suspend Mode Timing
• Device DNA Timing
• Configuration and JTAG Timing
Module 4:
Pinout Descriptions
DS529-4 (v2.0) August 19, 2010
• Pin Descriptions
• Package Overview
• Pinout Tables
• Footprint Diagrams
For more information on the Spartan-3A FPGA family, go to
www.xilinx.com/spartan3a
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Spartan-3A FPGA Family:
Data Sheet
DS529 August 19, 2010
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Product Specification
Spartan-3A FPGA Status
XC3S50A Production
XC3S200A Production
XC3S400A Production
XC3S700A Production
XC3S1400A Production
