DS855 October 19, 2011 www.xilinx.com 1
Product Specification
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Introduction
The ChipScope™ Pro IBERT core for Kintex™-7 FPGA
GTX transceivers is customizable and designed for
evaluating and monitoring Kintex-7 FPGA GTX
transceivers. This core includes pattern generators and
checkers that are implemented in FPGA logic, and
access to ports and the dynamic reconfiguration port
attributes of the GTX transceivers. Communication
logic is also included to allow the design to be run-time
accessible through JTAG. This core can be used as a self-
contained or an open design, based on customer
configuration, and as described in this document.
Features
• Provides a communication path between the
ChipScope Pro Analyzer software and the IBERT
core.
• Has user-selectable number of Kintex-7 FPGA GTX
transceivers.
• Each transceiver can be customized for the desired
line rate, reference clock rate, reference clock
source, and datapath width.
• Requires a system clock that can be sourced from a
pin or one of the enabled GTX transceivers.
ChipScope Pro Integrated
Bit Error Ratio Test (IBERT)
for Kintex-7 FPGA GTX (v2.01.a)
DS855 October 19, 2011 Product Specification
LogiCORE IP Facts Table
Core Specifics
Supported
Device
Family
(1)
1. Including the variants of this FPGA device.
Kintex-7
Supported
User Interfaces
N/A
Resources
(2)
2. Resources listed here are for Kintex-7 devices. For more complete
device performance numbers, see Table 2.
Frequency
Configuration LUTs FFs
DSP
Slices
Block
RAMs
Max. Freq
(3)
3. Performance numbers listed are for Kintex-7 FPGAs. For more
complete performance data, see Performance and Resource
Utilization.
Config1
2401 4120
00
306.551 MHz
Config2
8359 14533
00
295.859 MHz
Config3
23516 41022
00
246.233 MHz
Provided with Core
Documentation
Product Specification
User Guide
Design Files Netlist
Example
Design
Verilog/VHDL
Test Bench Not Provided
Constraints
File
Xilinx Constraints and Synthesis Constraints
Simulation
Model
Not Provided
Tested Design Tools
Design Entry
Tools
Xilinx CORE Generator™ tool
Simulation Not Provided
Synthesis
Tools
Not Provided
Support
Provided by Xilinx @ www.xilinx.com/support