DS579 December 14, 2010 www.xilinx.com 1
Product Specification
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Introduction
The XPS Central DMA Controller provides simple
Direct Memory Access (DMA) services to peripherals
and memory devices on the PLB. The controller
transfers a programmable quantity of data from a
source address to a destination address without
processor intervention.
Features
• Connects as a 32-bit master/slave on PLB V4.6
buses of 32, 64 or 128 bits
• Provides a single physical channel of Direct
Memory Access between a source address and a
destination address
• Provides programmable registers for source
address, destination address and transfer length
• Parameterizable local FIFO depth and burst length
• Supports different clock domains for Master and
Slave interfaces
• The source address and destination address can be
arbitrarily aligned (down to the byte)
• Supports overlapped PLB read/write transfers
which will give better performance
• Supports unaligned address transfers
• Supports setting up of source and destination
addresses as incrementing or fixed (keyhole)
• Supports PLB burst transfers
LogiCORE IP XPS Central DMA
Controller (v2.03a)
DS579 December 14, 2010 Product Specification
LogiCORE™ IP Facts Table
Core Specifics
Supported
Device Family
(1)
Spartan®-3, Spartan-3E, Spartan-3A,
Spartan-6, Spartan-3A DSP, Automotive
Spartan-3/3A/3A DSP/ 3E, Virtex®-4, Virtex-4Q,
Virtex-4QV, Virtex-5/5FX, Virtex-6/6CX
Supported User
Interfaces
PLBv46
Resources
Block RAMS
For Virtex-5 FPGA, see Table 14 , for Virtex-5
FPGA, see Ta b le 1 5 , for Spartan-3E, see
Ta bl e 16 , for Virtex-6 FPGA, see Tabl e 17 . and
for Spartan-6 FPGA, see Tabl e 18 .
LUTs
Slices
FFs
Provided with Core
Documentation Product Specification
Design Files VHDL
Example Design Not Provided
Test Bench Not Provided
Constraints File Not Provided
Simulation
Model
N/A
Tested Design Tools
Design Entry
Tools
Platform Studio
Simulation Mentor Graphic ModelSim v6.5c and above
Synthesis Tools XST
Support
Provided by Xilinx, Inc.
Notes:
1. For a complete listing of supported devices, see the release
notes for this core.
