DS444 March 1, 2011 www.xilinx.com 1
Product Specification
© 2003-2006, 2009-2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United
States and other countries. All other trademarks are the property of their respective owners.
Introduction
The BRAM Block is a configurable memory module
that attaches to a variety of BRAM Interface Control-
lers.
The BRAM Block structural HDL is generated by the
EDK design tools based on the configuration of the
BRAM interface controller IP. All BRAM Block parame-
ters are automatically calculated and assigned by the
Platgen and Simgen EDK tools.
Features
Fully automated generation and configuration of
HDL through EDK Platgen and Simgen tools.
Number of BRAM primitives utilized is a function
of the configuration parameters for: memory
address range, number of byte-write enables, the
data width, and the targeted architecture
Both Port A and Port B of the memory block can be
connected to independent BRAM Interface
Controllers: LMB (Local Memory Bus), PLB
(Processor Local Bus), and OCM (On-Chip
Memory).
Supports byte, half-word, word, and
doubleword transfers provided the correct
number of byte-write enables have been
configured
IP Processor Block RAM
(BRAM) Block (v1.00a)
DS444 March 1, 2011 Product Specification
LogiCORE IP Facts
Core Specifics
Supported Device
Family
Spartan
®
-3A/3A DSP, Spartan-3,
Spartan-3E, Automotive
Spartan 3/3E/3A/3A DSP, Spartan-6,
Virtex
®
-4 /4Q/4QV, Virtex-5/5FX,
Virtex-6/6CX
Resources Used
I/O LUTs FFs
Block
RAMs
nnnn
Special Features Add if applicable
Provided with Core
Documentation Product Specification
Design File Formats VHDL
Constraints File .ucf (user constraints file)
Verification VHDL Test Bench
Instantiation Template VHDL Wrapper
Additional Items N/A
Design Tool Requirements
Xilinx Implementation
Tools
ISE® 12.1
Verification
Mentor Graphics ModelSim: v6.5c
and above
Simulation
Mentor Graphics ModelSim: v6.5.c
and above
Synthesis XST
Support
Provided by Xilinx, Inc.
