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DS299

DS299首页预览图
型号: DS299
PDF文件:
  • DS299 PDF文件
  • DS299 PDF在线浏览
功能描述: Has multiple trigger ports, which can be combined
PDF文件大小: 527.15 Kbytes
PDF页数: 共14页
制造商: XILINX[Xilinx, Inc]
制造商LOGO: XILINX[Xilinx, Inc] LOGO
制造商网址: http://www.xilinx.com
捡单宝DS299
PDF页面索引
120%
DS299 June 22, 2011 www.xilinx.com 1
Product Specification
© Copyright 2008-2011 Xilinx, Inc. XILINX, the Xilinx logo, Kintex, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the
United States and other countries. The PowerPC name and logo are registered trademarks of IBM Corp. and used under license. All other trademarks are the
property of their respective owners.
Introduction
The LogiCORE™ IP ChipScope™ Pro Integrated Logic
Analyzer (ILA) core is a customizable logic analyzer
core that can be used to monitor any internal signal of
your design. The ILA core includes many advanced
features of modern logic analyzers, including boolean
trigger equations, trigger sequences, and storage
qualification. Because the ILA core is synchronous to
the design being monitored, all design clock constraints
that are applied to your design are also applied to the
components inside the ILA core.
Features
Provides a communication path between the
ChipScope Pro Analyzer software and capture
cores via the ChipScope Pro Integrated Controller
(ICON) core
Has user-selectable trigger width, data width, and
data depth
Has multiple trigger ports, which can be combined
into a single trigger condition or sequence
Includes storage qualification option that enables
the core to store a sample only when a certain
condition is met
LogiCORE IP ChipScope Pro
Integrated Logic Analyzer
(ILA) (v1.04a)
DS299 June 22, 2011 Product Specification
LogiCORE IP Facts Table
Core Specifics
Supported Device
Family
(1)
Kintex-7
(6)
, Virtex-7, Virtex-6
(4)
, Virtex-5,
Virtex-4, Spartan-6
(5)
, Spartan-3/XA, Spartan-
3E/XA, Spartan-3A/3AN/3A DSP/XA
Supported User
Interfaces
Not applicable
Resources Frequency
Configuration
(3)
LUTs FFs
DSP
Slices
Block
RAMs
Max. Freq.
Config1
156 270 0 1
313.239
MHz
Config2
391 698 0 4
243.858
MHz
Config3
4262 8400 0 228
412.788
MHz
Provided with Core
Documentation
Product Specification
User Guide
Design Files Netlist
Example Design Verilog /VHDL
Test Bench Not Provided
Constraints File Xilinx Constraints File
Simulation Model Not Provided
Tested Design Tools
(2)
Design Entry
Tools
CORE Generator tool, XPS
Simulation Not Provided
Synthesis Tools Not Provided.
Support
Provided by Xilinx, Inc.
Notes:
1. For a list of supported derivative devices, see
http://www.xilinx.com/ise/embedded/ddsupport.htm.
2. For the supported versions of the tools, see the ISE Design
Suite 13: Release Notes Guide.
3. For configuration details, see Table 4, page 13.
4. For more information, see the DS150 Virtex-6 Family
Overview
Product Specification.
5. For more information, see DS160 Spartan-6 Family Overview
Product Specification.
6. For more information, see DS180 7 Series FPGAs Overview.
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