Features
• The 30nm long gate, only 75% the size of the
CS100 transistors.
• 20 to 30% faster performance than the 90nm
generation.
• Transistor density doubled compared with the
90nm generation.
• SRAM cell area reduced 50% compared with the
90nm generation.
65nm CMOS Technology, CS200 / CS200A
Description
As miniaturization of silicon devices progresses,
Fujitsu provides the most competitive, world-class
technology to ASIC and COT customers. Fujitsu's
65nm technology has shrunk gates by 25% when
compared to the 90nm technology.
Fujitsu will start tape-out acceptance for the
technology in early 2006.
Specifications
65nm (CS200) 65nm (CS200A)
Gate length 30nm 50nm
Core VDD 1.0V 1.2V
Gate oxide thickness (physical) 1.1nm 1.7nm
Gate electrode NiSi / Poly-Si CoSi2 / Poly-Si
Source / drain electrode NiSi CoSi2
Interconnects 11-Cu + 1-Al s
Metal 1 pitch 0.18µm s
Inter-level dielectric Porous ULK (k = 2.25) s
Drain current enhancement Advanced stress control s
