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BD5356FVE-TR

BD5356FVE-TR首页预览图
型号: BD5356FVE-TR
PDF文件:
  • BD5356FVE-TR PDF文件
  • BD5356FVE-TR PDF在线浏览
功能描述: Free Delay Time Setting CMOS Voltage Detector IC Series
PDF文件大小: 400.42 Kbytes
PDF页数: 共16页
制造商: ROHM[Rohm]
制造商LOGO: ROHM[Rohm] LOGO
制造商网址: http://www.rohm.com
捡单宝BD5356FVE-TR
PDF页面索引
120%
Datasheet
13/13
BD52xx series BD53xx series
TSZ02201-0R7R0G300040-1-
2
© 2013 ROHM Co., Ltd. All rights reserved.
22.May.2013 Rev.006
www.rohm.com
TSZ2211115001
Operational Notes
1) Absolute maximum ratings
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit
between pins or an open circuit between pins. Therefore, it is important to consider circuit protection measures, such
as adding a fuse, in case the IC is operated over the absolute maximum ratings.
2) Ground Voltage
The voltage of the ground pin must be the lowest voltage of all pins of the IC at all operating conditions. Ensure that no
pins are at a voltage below the ground pin at any time, even during transient condition.
3) Recommended operating conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
4) Bypass Capacitor for Noise Rejection
To help reject noise, put a 1µF capacitor between V
DD pin and GND and 1000pF capacitor between VOUT pin and GND.
Be careful when using extremely big capacitor as transient response will be affected.
5) Short between pins and mounting errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong
orientation or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.
6) Operation under strong electromagnetic field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
7) The V
DD
line impedance might cause oscillation because of the detection current.
8) A V
DD
to GND capacitor (as close connection as possible) should be used in high VDD line impedance condition.
9) Lower than the mininum input voltage puts the VOUT in high impedance state, and it must be VDD in pull up (VDD)
condition.
10) External parameters
The recommended value of R
L
Resistor is 50k to 1M. The recommended value of C
T
Capacitor is over 100pF to
0.1µF. There are many factors (board layout, etc) that can affect characteristics. Please verify and confirm using
practical applications.
11) Power on reset operation
Please note that the power on reset output varies with the V
DD
rise time. Please verify the behavior in the actual
operation.
12) Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
13) Rush current
When power is first supplied to the IC, rush current may flow instantaneously. It is possible that the charge current to
the parasitic capacitance of internal photo diode or the internal logic may be unstable. Therefore, give special
consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of connections.
14) C
T
pin discharge
Due to the capabilities of the C
T
pin discharge transistor, the C
T
pin may not completely discharge when a short input
pulse is applied, and in this case the delay time may not be controlled. Please verify the actual operation.
.
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