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82596DX

82596DX首页预览图
型号: 82596DX
PDF文件:
  • 82596DX PDF文件
  • 82596DX PDF在线浏览
功能描述: HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
PDF文件大小: 787.71 Kbytes
PDF页数: 共77页
制造商: INTEL[Intel Corporation]
制造商LOGO: INTEL[Intel Corporation] LOGO
制造商网址: http://www.intel.com
捡单宝82596DX
PDF页面索引
120%
*Other brands and names are the property of their respective owners.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
November 1995COPYRIGHT
©
INTEL CORPORATION, 1996 Order Number: 290219-006
82596DX AND 82596SX
HIGH-PERFORMANCE 32-BIT LOCAL
AREA NETWORK COPROCESSOR
Y
Performs Complete CSMA/CD Medium
Access Control (MAC) FunctionsÐ
Independently of CPU
Ð IEEE 802.3 (EOC) Frame Delimiting
Y
Supports Industry Standard LANs
Ð IEEE TYPE 10BASE-T (TPE),
IEEE TYPE 10BASE5 (Ethernet*),
IEEE TYPE 10BASE2 (Cheapernet),
IEEE TYPE 1BASE5 (StarLAN),
and the Proposed Standard
TYPE 10BASE-F
Ð Proprietary CSMA/CD Networks Up
to 20 Mb/s
Y
On-Chip Memory Management
Ð Automatic Buffer Chaining
Ð Buffer Reclamation after Receipt of
Bad Frames; Optional Save Bad
Frames
Ð 32-Bit Segmented or Linear (Flat)
Memory Addressing Formats
Y
82586 Software Compatible
Y
Optimized CPU Interface
Ð 82596DX Bus Interface Optimized to
Intel’s 32-Bit i386
TM
DX
Ð 82596SX Bus Interface Optimized to
Intel’s 16-Bit i386
TM
SX
Ð Supports Big Endian and Little
Endian Byte Ordering
Y
High-Performance 16-/32-Bit Bus
Master Interface
Ð 66-MB/s Bus Bandwidth
Ð 33-MHz Clock, Two Clocks Per
Transfer
Ð Bus Throttle Timers
Ð Transfers Data at 100% of Serial
Bandwidth
Ð 128-Byte Receive FIFO, 64-Byte
Transmit FIFO
Y
Network Management and Diagnostics
Ð Monitor Mode
Ð 32-Bit Statistical Counters
Y
Self-Test Diagnostics
Y
Configurable Initialization Root for Data
Structures
Y
High-Speed, 5-V, CHMOS** IV
Technology
Y
132-Pin Plastic Quad Flat Pack (PQFP)
and PGA Package
(See Packaging Specifications Order Number: 240800-001,
Package Type KU and A)
i386
TM
is a trademark of Intel Corporation
*Ethernet is a registered trademark of Xerox Corporation.
**CHMOS is a patented process of Intel Corporation.
2902191
Figure 1. 82596DX/SX Block Diagram
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