82541 Family of Gigabit Ethernet
Controllers
Networking Silicon - 82541(PI/GI/EI)
Datasheet
Product Features
■ PCI Bus
— PCI r evision 2.3, 32-bit, 33/66 MHz
— Algorithms that optimally use advanced PCI,
MWI, MRM, and MRL commands
— CLK_RUN# signal
— 3.3 V (5 V tolerant PCI signaling)
■ MAC Specific
— Low-lat ency transmit and receive queues
— IEEE 802. 3x-complian t flow-control suppor t
with software-con trol la ble thresho ld s
— Caches up to 64 packet descriptors in a single
burst
— Programmabl e host memory receive b uffers
(256 B to 16 KB) and cache line size (16 B to
256 B)
— Wide, optimized internal data path
architecture
— 64 KB configurable Transmit and Receive
FIFO buffers
■ PHY Specific
— Integrated for 10/100/1000 Mb/s full- and
half-d up le x operat i on
— IEEE 802. 3a b Auto -Ne gotia tio n an d PHY
complianc e and compa tib ilit y
— State -of-the-art DSP archit ecture implements
digital adaptive equalization, echo and cross-
talk cancellation
— Automatic polarity detec tion
— Automatic de tection of cable lengths and
MDI vs. MDI-X ca bl e at all speeds
■ Host Off-Loading
— Transmit and receive IP, TCP, and UDP
checksum off-loading capabilities
— Transmit TCP segmen tation and ad vanced
packed filtering
— IEEE 802. 1Q VLAN ta g insertio n an d
strippin g and pa c ket f ilterin g for up to 4096
VLAN tags
— Jumbo frame support up to 16 KB
— Intelligent Interrupt generation (multiple
packets per i nterrupt)
■ Manageability
— On-chip SMBus 2.0 port
— ASF 1.0 and 2.0
— Compliance with PCI Power Management
v1.1/ACPI v2.0
— Wake on LAN* (WoL) support
— Smart Power Down mode when no signal is
detected on the wire
— Power Save mode swit c hes link speed from
1000 Mb/s do w n to 10 or 10 0 Mb/s when on
battery power
■ Additional Device
— Four programm able LED outputs
— On -chip power regulator c o ntro l circuitry
— BIOS LAN Disable pin
— JTAG (IEEE 1149.1) Test Access Port built
in silicon (3.3 V, 5 V tolerant PCI signaling)
■ Lead-free
a
196-p in Ball Grid Array (BGA).
Devices that are lead-free are marked with a
circled “e1” and have the product code:
LUxxxxxx.
a. This dev ice is lead-free. T hat is, le ad has no t been i n tentio n ally added, but lead may still exist as an impurity at
<1000 ppm. The Material Declaration Data Sheet, which includes lead impurity levels and the concentration of other
Restriction on Hazardous Substances (RoHS)-banned materials, is available at:
ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks
In addition, this device has be en tested and conforms to the same parametr ic spec ifications as previous versio ns of
the dev i ce.
For more in form ation regarding lead-free products from Inte l Co rporation, contact your Intel Field S ales re presen-
tative
318138-002
Revision 2.7
