1. General description
The 74AXP1T34 is a dual supply translating buffer. It features one input (A), an output (Y)
and dual supply p ins (V
CCI
and V
CCO
). The inputs are reference d to V
CCI
and the output is
referenced to V
CCO
. All inputs can be connected directly to V
CCI
or GND. V
CCI
can be
supplied at any voltage between 0.7 V and 2.75 V and V
CCO
can be supplied at any
voltage between 1.2 V and 5.5 V. This feature allows voltage level translation.
Schmitt-trigger action at all input s makes the circuit tolerant of slower input rise and fall
times.
This device ensures very low static and dynamic power consumption across the entire
supply range and is fully sp ecified for partial power down applications using I
OFF
. The I
OFF
circuitry disabl es the output, preventing th e potentially damaging backflow cur rent through
the device when it is powe red down.
2. Features and benefits
Wide supply voltage range:
V
CCI
: 0.7 V to 2.75 V
V
CCO
: 1.2 V to 5.5 V
Low input capacitance; C
I
= 0.6 pF (typical)
Low output capacitance; C
O
= 1.8 pF (typical)
Low dynamic power consumption; C
PD
= 0.4 pF at V
CCI
= 1.2 V (typical)
Low dynamic power consumption; C
PD
= 7.1 pF at V
CCO
= 3.3 V (typical)
Low static power consumption; I
CCI
= 0.5 A (85 C maximum)
Low static power consumption; I
CCO
= 1.8 A (85 C maximum)
High noise immunity
Complies with JEDEC standard:
JESD8-12A.01 (1.1 V to 1.3 V; A input)
JESD8-11 A.01 (1.4 V to 1.6 V)
JESD8-7A (1.65 V to 1. 95 V)
JESD8-5A.01 (2.3 V to 2.7 V)
JESD8-C (2.7 V to 3.6 V; Y output)
JESD12-6 (4.5 V to 5.5 V; Y output)
ESD protection:
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
CDM JESD22-C101E exceeds 1000 V
Latch-up performance exceeds 100 mA per JESD78D Class II
Inputs accept voltages up to 2.75 V
74AXP1T34
Dual supply translating buffer
Rev. 1 — 22 December 2015 Product data sheet
