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74AVCH4T245BQ-Q100

74AVCH4T245BQ-Q100首页预览图
型号: 74AVCH4T245BQ-Q100
PDF文件:
  • 74AVCH4T245BQ-Q100 PDF文件
  • 74AVCH4T245BQ-Q100 PDF在线浏览
功能描述: 4-bit dual supply translating transceiver with configurable voltage translation 3-state
PDF文件大小: 870.58 Kbytes
PDF页数: 共27页
制造商: NEXPERIA[Nexperia B.V. All rights reserved]
制造商LOGO: NEXPERIA[Nexperia B.V. All rights reserved] LOGO
制造商网址: https://www.nexperia.com/
捡单宝74AVCH4T245BQ-Q100
供应商
型号
品牌
封装
批号
库存数量
备注
询价
  • 深圳市高捷芯城科技有限公司

    10

    0755-8253826013352985419木易深圳市福田区航都大厦10B11016882

  • 74AVCH4T245BQ-Q100
  • NXP(恩智浦) 
  • DHVQFN16 
  • 24+ 
  • 1157200 
  •  

  • 深圳市浩睿泽电子科技有限公司

    15

    1985477335219854773352罗先生深圳市福田区福田街道岗厦社区彩田路3069号星河世纪A栋2003F19一级代理分销,只做原装11015339

  • 74AVCH4T245BQ-Q100
  • NXP 
  • DHVQFN16 
  • 新批? 
  • 6425 
  • 只做原装正品 

  • 深圳市壹芯创科技有限公司

    5

    0755-8279663113418647129朱先生深圳市福田区振兴路156号上步工业区405栋31611013811

  • 74AVCH4T245BQ-Q100
  • Nexperia(安世) 
  • N/A 
  • 24+ 
  • 18000 
  • 只做原装 正品现货 

PDF页面索引
120%
1. General description
The 74AVCH4T245-Q100 is a 4-bit, dual supply transceiver that enables bidirectional
level translation. The device can be used as two 2-bit transceivers or as a 4-bit
transceiver. It features two 2-bit input-output ports (nAn and nBn), a dir ection control input
(nDIR), an output enable input (nOE
) and dual supply pins (V
CC(A)
and V
CC(B)
). Both
V
CC(A)
and V
CC(B)
can be supplied with any voltage be twe en 0.8 V and 3.6 V. This feature
makes the device suitable for translating between any of the low voltage nodes (0.8 V,
1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE
and nDIR are referenced to V
CC(A)
and pins nBn are referenced to V
CC(B)
. A HIGH on nDIR allows transmission from nAn to
nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input
(nOE
) can be used to disable the outputs so the buses are effectively isola te d .
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at
GND level, both nAn and nBn outputs are in the hi gh-impedance OFF-st ate. The bus hold
circuitry on the powered-up side always stays active.
The 74AVCH4T245-Q100 has active bus hold circuitry which is provided to hold unused
or floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8- 7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
74AVCH4T245-Q100
4-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Rev. 2 — 17 December 2015 Product data sheet
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