1. General description
The 74AUP3G16 is a triple buffer.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall
times.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
. The I
OFF
circuitry disab le s the out pu t, pr ev en tin g a dam ag in g ba ckf low current thro ug h th e de vice
when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 50 00 V
MM JESD22-A115-A ex ce ed s 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9 A (maximum)
Latch-up pe rform a nce exceeds 10 0 mA per JESD 78 B C las s II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74AUP3G16
Low-power triple buffer
Rev. 2 — 12 October 2016 Product data sheet