1. General description
The 74ALVCH32973 is a 16-bit bus transceiver and transparent D-type latch with 8
independent buffers with bus hold inputs and 3-state outputs. It features direction (1DIR,
2DIR), latch enable (1LOE
, 2LOE), transceiver output enable (1T OE, 2TOE) and latch
enable (1LE, 2LE) control inputs; four 8-bit transceiver ports (1An, 2An & 1Bn, 2Bn); two
8-bit D-type latch output ports (1Qn, 2Qn) and an 8-bit buffer with data inputs Dn and
outputs Yn. The configuration of the control pins allows the device to be used as one 8- bit
buffer, two 8-bit transceivers, and two 8-bit latches or one 8-bit buffer, one 16-bit
transceiver and one 16-bit latch.
The 8-bit buffer functions independently of the control inputs. The direction of data
transmission between A and B is controlled by nDIR and when nTOE
is set HIGH the A
and B ports will assume a HIGH-impedance OFF-state, they will be effectively isolated.
When nLE is HIGH, dat a at the A inpu ts e nter the latches. In this con dition the latches are
transparent, a Q output will change each time its corresponding A-input changes. When
nLE is LOW the latches store the information that was present at the inputs a set-up time
preceding the HIGH-to-LOW transition of nLE. A HIGH on nLOE
causes the Q outputs to
assume a high-impedance OFF-state. Operation of the nLOE
input does not affect the
state of the latches.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standard JESD8-B
CMOS low power consumption
Direct interface with TTL levels
All data inputs have bus hold
Output drive capability 50 transmission lines at 85 C
Current drive 24 mA at V
CC
= 3.0 V
74ALVCH32973
16-bit bus transceiver and transparant D-type latch with 8
independent buffers
Rev. 3 — 17 January 2013 Product data sheet
