1. General description
The 74AHC00-Q100; 74AHCT00-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. JESD7-A.
The 74AHC00-Q100; 74AHCT00-Q100 provides the quad 2-input NAND function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher tha n V
CC
Input levels:
For 74AHC00-Q100: CMOS level
For 74AHCT00-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
74AHC00-Q100;
74AHCT00-Q100
Quad 2-input NAND gate
Rev. 1 — 16 April 2013 Product data sheet
