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73K224L-IGT

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型号: 73K224L-IGT
PDF文件:
  • 73K224L-IGT PDF文件
  • 73K224L-IGT PDF在线浏览
功能描述: V.22bis/V.22/V.21/ Bell 212A/Bell 103 Single-Chip Modem
PDF文件大小: 206.86 Kbytes
PDF页数: 共32页
制造商: TDK[TDK Electronics]
制造商LOGO: TDK[TDK Electronics] LOGO
制造商网址: http://www.tdk.com
捡单宝73K224L-IGT
PDF页面索引
120%
73K224L
V.22bis/V.22/V.21/ Bell 212A/Bell 103
Single-Chip Modem
April 2000
DESCRIPTION
The 73K224L is a highly integrated single-chip
modem IC which provides the functions needed to
construct a V.22bis compatible modem, capable of
2400 bit/s full-duplex operation over dial-up lines. The
73K224L offers excellent performance and a high
level of functional integration in a single 28-pin DIP
and 44-pin TQFP package. This device supports
V.22bis, V.22, V.21, Bell 212A and Bell 103 modes of
operation, allowing both synchronous and
asynchronous communication. The 73K224L is
designed to appear to the systems designer as a
microprocessor peripheral, and will easily interface
with popular single-chip microprocessors (80C51
typical) for control of modem functions through its 8-
bit multiplexed address/data bus or via an optional
serial control bus. An ALE control line simplifies
address demultiplexing. Data communications
normally occur through a separate serial port. The
73K224L is pin and software compatible with the
73K212L and 73K222L single-chip modem ICs,
allowing system upgrades with a single component
change.
The 73K224L operates from a single +5V supply for
low power consumption.
The 73K224L is ideal for use in either free-standing or
integral system modem products where full-duplex
(continued)
FEATURES
One-chip multi-mode V.22bis/V.22/V.21 and Bell
212A/103 compatible modem data pump
FSK (300 bit/s), DPSK (600, 1200 bit/s), or QAM
(2400 bit/s) encoding
Pin and software compatible with other TDK
Semiconductor Corporation K-Series 1-chip
modems
Interfaces directly with standard microcontrollers
(80C51 typical)
Parallel microcontroller bus for modem control and
status monitoring functions
Selectable asynch/synch with internal
buffer/debuffer and scrambler/descrambler
functions
All synchronous and asynchronous operating
modes (internal, external, slave)
Adaptive equalization for optimum performance
over all lines
Programmable transmit attenuation (16 dB, 1 dB
steps), selectable receive boost (+18 dB)
Call progress, carrier, answer tone, unscrambled
mark, S1, and signal quality monitors
DTMF, answer and guard tone generators
Test modes available: ALB, DL, RDL, Mark, Space,
Alternating bit, S1 pattern
CMOS technology for low power consumption
(typically 100 mW @ 5V) with power-down mode
(15 mW @ 5V)
TTL and CMOS compatible inputs and outputs
BLOCK DIAGRAM
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