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5962-8512801VSA

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型号: 5962-8512801VSA
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  • 5962-8512801VSA PDF文件
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功能描述: OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
PDF文件大小: 913.9 Kbytes
PDF页数: 共21页
制造商: TI[Texas Instruments]
制造商LOGO: TI[Texas Instruments] LOGO
制造商网址: http://www.ti.com
捡单宝5962-8512801VSA
PDF页面索引
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  
SCLS147E − DECEMBER 1982 − REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
D Low Power Consumption, 80-µA Max I
CC
D Typical t
pd
= 21 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Bus-Structured Pinout
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2D
1D
OE
8Q
7Q
V
1Q
8D
GND
LE
SN54HC573A ...FK PACKAGE
(TOP VIEW)
CC
SN54HC573A ...J OR W PACKAGE
SN74HC573A . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
description/ordering information
These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive
or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the
outputs are latched to retain the data that was set up.
A buffered output-enable ( O E
) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube of 25 SN74HC573AN SN74HC573AN
SOIC − DW
Tube of 40 SN74HC573ADW
HC573A
−40°C to 85°C
SOIC − DW
Reel of 2500 SN74HC573ADWR
HC573A
−40°C to 85°C
SSOP − DB Reel of 2000 SN74HC573ADBR HC573A
TSSOP − PW
Reel of 2000 SN74HC573APWR
HC573A
TSSOP − PW
Reel of 250 SN74HC573APWT
HC573A
CDIP − J Tube of 25 SNJ54HC573AJ SNJ54HC573AJ
−55°C to 125°C
CFP − W Tube of 150 SNJ54HC573AW SNJ54HC573AW
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC573AFK SNJ54HC573AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
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