54AC11002, 74AC11002
QUADRUPLE 2-INPUT POSITIVE-NOR GATES
SCAS024A – JUNE 1987 – REVISED APRIL 1993
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1993, Texas Instruments Incorporated
2–1
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
CC
and GND Configuration
Minimizes High-Speed Switching Noise
•
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These devices contain four independent 2-input
NOR gates. They perform the Boolean functions
Y = A B or Y = A + B in positive logic.
The 54AC11002 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The 74AC11002 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B
Y
H X L
X HL
L L H
logic symbol
†
logic diagram (positive logic)
1
1A
16
1B
1Y
2
15
2A
14
2B
2Y
3
11
3A
10
3B
3Y
6
9
4A
8
4B
4Y
7
1Y
1A
1B
1
16
2
2Y
2A
2B
15
14
3
3Y
3A
3B
11
10
6
4Y
4A
4B
9
8
7
≥ 1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
3B
4A
NC
4B
4Y
2A
1B
NC
1A
1Y
54AC11002 . . . FK PACKAGE
(TOP VIEW)
2B
GND
3A
GND
NC
CC
V
NC
3Y
2Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1A
1Y
2Y
GND
GND
3Y
4Y
4B
1B
2A
2B
V
CC
V
CC
3A
3B
4A
54AC11002 ...J PACKAGE
74AC11002 ...D OR N PACKAGE
(TOP VIEW)
NC – No internal connection
CC
V
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.