HCC/HCF4027B
DUAL-J-K MASTER-SLAVE FLIP-FLOP
DESCRIPTION
.SET-RESET CAPABILITY
.STATIC FLIP-FLOP OPERATION - RETAINS
STATE INDEFINITELY WITH CLOCK LEVEL
EITHER ”HIGH” OR ”LOW”
.MEDIUM SPEED OPERATION - 16MHz (typ.
clock toggle rate at 10V)
.STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
.QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.INPUT CURRENTOF 100nA AT 18V AND 25°C
FOR HCC DEVICE
.100% TESTED FOR QUIESCENT CURRENT
.MEETSALLREQUIREMENTS OF JEDECTEN-
TATIVE STANDARD N
0
. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”.
June 1989
The HCC4027B (extended temperature range) and
HCF4027B (intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micro package.
The HCC/HCF4027B is a single monolithic chip in-
tegratedcircuit containing twoidentical complemen-
tary-symmetry J-K master-slave flip-flops. Each
flip-flop has provisions forindividual J, K, Set, Reset,
and Clock input signals, Buffered Q and Q signals
are provided as outputs. This input-output arrange-
ment provides for compatible operation with the
HCC/HCF4013B dual D-type flip-flop.
TheHCC/HCF4027B isuseful in performing control,
register, and toggle functions. Logic levels present
at theJ and K inputs along with internal self-steering
control thestateof eachflip-flop ;changes in theflip-
flop state are synchronous with the positive-going
transition of the clock pulse. Set and reset functions
are independent of the clock and are initiated when
a high level signal is present at either the Set or
Reset input.
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
ORDER CODES :
HCC4027BF HCF4027BM1
HCF4027BEY HCF4027BC1
PIN CONNECTIONS
M1
(Micro Package)
C1
(Plastic Chip Carrier)
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